From: Nathan Lynch <nathan.lynch@amd.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>, Wei Huang <wei.huang2@amd.com>,
"Mario Limonciello" <mario.limonciello@amd.com>,
Bjorn Helgaas <bhelgaas@google.com>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <dmaengine@vger.kernel.org>
Subject: Re: [PATCH RFC 01/13] PCI: Add SNIA SDXI accelerator sub-class
Date: Mon, 15 Sep 2025 15:17:25 -0500 [thread overview]
Message-ID: <87ikhja2sq.fsf@AUSNATLYNCH.amd.com> (raw)
In-Reply-To: <20250915172509.GA1751399@bhelgaas>
Bjorn Helgaas <helgaas@kernel.org> writes:
> On Fri, Sep 05, 2025 at 01:48:24PM -0500, Nathan Lynch via B4 Relay wrote:
>> From: Nathan Lynch <nathan.lynch@amd.com>
>>
>> This was added to the PCI Code and ID Assignment Specification in
>> revision 1.14 (2021). Refer to 1.19. "Base Class 12h" of that document
>> as well as the "SDXI PCI-Express Device Architecture" chapter of the
>> SDXI specification:
>
> Would prefer if this said:
>
> Add sub-class code for SNIA Smart Data Accelerator Interface (SDXI).
> See PCI Code and ID Assignment spec r1.14, sec 1.19.
>
> so the antecedent of "this" is here instead of in the subject and
> "1.19" doesn't get confused with a spec revision.
>
>> """
>> SDXI functions are expected to be identified through the SDXI class
>> code.
>> * SNIA Smart Data Accelerator Interface (SDXI) controller:
>> * Base Class = 0x12
>> * Sub Class = 0x01
>> * Programming Interface = 0x0
>> """
>>
>> Information about SDXI may be found at the SNIA website:
>>
>> https://www.snia.org/sdxi
>
> I don't think the SDXI spec material is really necessary. The PCI
> Code and ID spec is definitive for class codes.
>
>> Co-developed-by: Wei Huang <wei.huang2@amd.com>
>> Signed-off-by: Wei Huang <wei.huang2@amd.com>
>> Signed-off-by: Nathan Lynch <nathan.lynch@amd.com>
>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Thanks Bjorn, I have made the commit message changes you've suggested
and incorporated your ack for this patch.
next prev parent reply other threads:[~2025-09-15 20:17 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-05 18:48 [PATCH RFC 00/13] dmaengine: Smart Data Accelerator Interface (SDXI) basic support Nathan Lynch via B4 Relay
2025-09-05 18:48 ` [PATCH RFC 01/13] PCI: Add SNIA SDXI accelerator sub-class Nathan Lynch via B4 Relay
2025-09-15 17:25 ` Bjorn Helgaas
2025-09-15 20:17 ` Nathan Lynch [this message]
2025-09-05 18:48 ` [PATCH RFC 02/13] dmaengine: sdxi: Add control structure definitions Nathan Lynch via B4 Relay
2025-09-05 18:48 ` [PATCH RFC 03/13] dmaengine: sdxi: Add descriptor encoding and unit tests Nathan Lynch via B4 Relay
2025-09-15 11:52 ` Jonathan Cameron
2025-09-15 19:30 ` Nathan Lynch
2025-09-16 14:20 ` Jonathan Cameron
2025-09-16 19:06 ` Nathan Lynch
2025-09-05 18:48 ` [PATCH RFC 04/13] dmaengine: sdxi: Add MMIO register definitions Nathan Lynch via B4 Relay
2025-09-05 18:48 ` [PATCH RFC 05/13] dmaengine: sdxi: Add software data structures Nathan Lynch via B4 Relay
2025-09-15 11:59 ` Jonathan Cameron
2025-09-16 19:07 ` Nathan Lynch
2025-09-16 9:38 ` Markus Elfring
2025-09-05 18:48 ` [PATCH RFC 06/13] dmaengine: sdxi: Add error reporting support Nathan Lynch via B4 Relay
2025-09-15 12:11 ` Jonathan Cameron
2025-09-15 20:42 ` Nathan Lynch
2025-09-16 14:23 ` Jonathan Cameron
2025-09-05 18:48 ` [PATCH RFC 07/13] dmaengine: sdxi: Import descriptor enqueue code from spec Nathan Lynch via B4 Relay
2025-09-15 12:18 ` Jonathan Cameron
2025-09-16 17:05 ` [External] : " ALOK TIWARI
2025-09-05 18:48 ` [PATCH RFC 08/13] dmaengine: sdxi: Context creation/removal, descriptor submission Nathan Lynch via B4 Relay
2025-09-15 14:12 ` Jonathan Cameron
2025-09-16 20:40 ` Nathan Lynch
2025-09-17 13:34 ` Jonathan Cameron
2025-09-15 19:42 ` Markus Elfring
2025-09-05 18:48 ` [PATCH RFC 09/13] dmaengine: sdxi: Add core device management code Nathan Lynch via B4 Relay
2025-09-15 14:23 ` Jonathan Cameron
2025-09-16 21:23 ` Nathan Lynch
2025-09-05 18:48 ` [PATCH RFC 10/13] dmaengine: sdxi: Add PCI driver support Nathan Lynch via B4 Relay
2025-09-05 19:14 ` Mario Limonciello
2025-09-10 15:25 ` Nathan Lynch
2025-09-05 20:05 ` Bjorn Helgaas
2025-09-10 15:28 ` Nathan Lynch
2025-09-15 15:03 ` Jonathan Cameron
2025-09-16 16:43 ` [External] : " ALOK TIWARI
2025-09-05 18:48 ` [PATCH RFC 11/13] dmaengine: sdxi: Add DMA engine provider Nathan Lynch via B4 Relay
2025-09-15 15:16 ` Jonathan Cameron
2025-09-05 18:48 ` [PATCH RFC 12/13] dmaengine: sdxi: Add Kconfig and Makefile Nathan Lynch via B4 Relay
2025-09-15 15:08 ` Jonathan Cameron
2025-09-15 16:44 ` Nathan Lynch
2025-09-05 18:48 ` [PATCH RFC 13/13] MAINTAINERS: Add entry for SDXI driver Nathan Lynch via B4 Relay
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87ikhja2sq.fsf@AUSNATLYNCH.amd.com \
--to=nathan.lynch@amd.com \
--cc=bhelgaas@google.com \
--cc=dmaengine@vger.kernel.org \
--cc=helgaas@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mario.limonciello@amd.com \
--cc=vkoul@kernel.org \
--cc=wei.huang2@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox