Re: [PATCH 01/21] mtd: spinand: Use more specific naming for the reset op

[Miquel Raynal <miquel.raynal@bootlin.com>]

Hello Tudor,

On 10/03/2025 at 12:14:06 +02, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:

> On 07.03.2025 17:45, Miquel Raynal wrote:
>> Hi Tudor,
>
> Hi!
>
>> 
>>>> -#define SPINAND_RESET_OP						\
>>>> +#define SPINAND_RESET_1S_0_0_OP						\
>>> Hi, Miquel,
>>>
>>> Have you seen any reset op with address or data? If not, I'm not really
>>> sure whether we shall change the name for these basic operations.
>>>
>>> Changing them to 1S-0-0 may also indicate that there are resets with
>>> address or data fields, which I find confusing.
>>>
>>> I think the change is good for reads and writes. I'll check further in
>>> the series and let you know.
>> 
>> I want to rename this macro for two reasons:
>> - We might see in the near future the addition of 8D-0-0 ops (I plan on
>>   working on it).
>> - I would like some kind of harmony among these macros.
>> 
>> Now, whether is should be named like I proposed or just
>> SPINAND_RESET_OP_1S, I have no strong preference and I can change that
>> in an upcoming version.
>> 
>> Which one would you prefer?
>
> I don't know. Which one is backed up by a standard?

Well, as far as I know, none of the SPI NAND devices follow a very
specific standard. Most vendors in practice follow similar conventions,
but they all deviate a bit from it.

> JESD216F defines
> "(An-Bn-Cn): Command mode nomenclature used to indicate the number of
> active pins used for the instruction (A), address (B), and data (C), and
> the data rate used for each. Data rates(n) can be single (S) and dual (D)."
>
> Also, "(x-y-z) nomenclature is equivalent to(AS-BS-CS) unless otherwise
> noted."
>
> What's an "active pin"?
>
> Then if I look at JESD251-1.01 and JESD251C, (An-Bn-Cn) is referred to
> as "protocol mode". Write Enable, which is just an instruction command
> with no address or data, is seen as a required command in both 4D-4D-4D
> and 8D-8D-8D protocol modes, and it's defined as a "1.A" transaction
> format command. And the transaction format is:
> '''
> The following transaction formats are used in Profile 1.0 mode 8D-8D-8D:
> Format 1.A: Command and Command Extension
> Format 1.B: Command, Command Extension, 4-byte Address, ‘n’ Latency
> Cycles, and Read Data
> Format 1.C: Command, Command Extension, and 4-byte Address
> Format 1.D: Command, Command Extension, 4-byte Address, and Write Data
> '''
>
> So according to these standards maybe we shall refer to it as:
> WREN-8D-8D-8D-1A? This seems less intuitive than 8D-0-0, but I think it
> all depends on what's an "active pin". I think it describes the protocol
> mode, and not what's actually sent on the line. As we saw, WREN is
> considered an 8D-8D-8D command, and not an 8D-0-0 command.
>
> For dual mode, which is not covered by xSPI, I guess we can use the
> single spi transaction formats 0.{A,B,C,...}.
>
> How do you feel about a OP-An-Bn-Cn-transaction-format,
> 	where A, B, C is {1, 2, 4, 8}
> 	n is {S, D}
> 	transaction format is {0,1,2,3}{A,B,C,...}
>
> Care must be taken care of at the transaction format, as I see there are
> a few, depending on the xSPI profile and protocol mode.

I must admit I really dislike the transaction format abbreviation because
it is specific to a spec we do not follow and is not explicit. I have a
strong preference towards keeping just "An-Bn-Cn", like I did in this
series. If people are in doubt, they can check what is in the op, it is
self explanatory. I chose this in the first place because it is more
explicit than just "An" which may feel like a cropped
acronym. Furthermore, most octal capable datasheets I've looked at seem
to use the "An-Bn-Cn" format, even for single opcodes.

So unless there are strong arguments against, I'd prefer to keep the
current formatting. TBH, it is not set in stone and can still evolve
later if that's needed.

Thanks,
Miquèl