Re: [PATCH v2] mtd: spinand: add support for FORESEE F35SQA002G

[Miquel Raynal <miquel.raynal@bootlin.com>]

Hi Sky,

On 12/11/2024 at 10:08:31 GMT, SkyLake Huang (黃啟澤) <SkyLake.Huang@mediatek.com> wrote:

> Hi Miquel/Martin,
> About this driver, including F35SQA001G/F35SQA002G parts, I'm concerned
> that the driver will always use 32H for update_cache operations, which
> means it's not compitable with those SPI controller who can't transmit
> 2048 bytes (most small-density SPI-NAND's page size nowadays) at one
> time.
>
> The following controller's driver seems that they can't transmit 2048
> bytes in one transmission:
> - spi-amd.c: 64 bytes (AMD_SPI_MAX_DATA)
> - spi-amlogic-spifc-a1.c: 512 bytes (SPIFC_A1_BUFFER_SIZE)
> - spi-fsl-qspi.c: 1KB
> - spi-hisi-sfc-v3xx.c: 64*6 bytes
> - spi-intel.c: 64 bytes (INTEL_SPI_FIFO_SZ)
> - spi-microchip-core-qspi.c: 256 bytesc (MAX_DATA_CMD_LEN)
> - spi-nxp-fspi.c: TX:1KB, RX: 512B in FIFO mode
> - spi-wpcm-fiu.c: 4B

I believe most of these drivers are still able to send one page of data
without toggling the CS (which is what actually matters, I believe). If
they were broken, they would be broken with all spi memory devices, not
only Foresee's.

> I guess we need to add some check to make sure that F35SQA series work
> only with those SPI controllers who can transmit more than 2048
> bytes(NAND page size) at one time?

There is already a supports_op() hook for that, I believe we are
fine. If however you experience errors, please report them and we'll
look for a solution.

Thanks,
Miquèl