From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Ricardo B. Marliere" <rbmarliere@gmail.com>,
joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com,
tvrtko.ursulin@linux.intel.com, airlied@gmail.com,
daniel@ffwll.ch, daniele.ceraolospurio@intel.com,
John.C.Harrison@Intel.com, alan.previn.teres.alexis@intel.com,
harshit.m.mogalapalli@oracle.com, michal.wajdeczko@intel.com,
gregkh@linuxfoundation.org
Cc: "Ricardo B. Marliere" <rbmarliere@gmail.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org, skhan@linuxfoundation.org
Subject: Re: [PATCH] gpu: drm: i915: fix documentation style
Date: Mon, 21 Aug 2023 19:22:04 +0300 [thread overview]
Message-ID: <87il9874cz.fsf@intel.com> (raw)
In-Reply-To: <20230821150241.40047-1-rbmarliere@gmail.com>
On Mon, 21 Aug 2023, "Ricardo B. Marliere" <rbmarliere@gmail.com> wrote:
> This patch fixes the following sphinx warnings in the htmldocs make target:
>
> Documentation/gpu/i915:546: ./drivers/gpu/drm/i915/gt/uc/intel_huc.c:29: ERROR: Unexpected indentation.
> Documentation/gpu/i915:546: ./drivers/gpu/drm/i915/gt/uc/intel_huc.c:30: WARNING: Block quote ends without a blank line; unexpected unindent.
> Documentation/gpu/i915:546: ./drivers/gpu/drm/i915/gt/uc/intel_huc.c:35: WARNING: Bullet list ends without a blank line; unexpected unindent.
>
> Signed-off-by: Ricardo B. Marliere <rbmarliere@gmail.com>
Already fixed by commit 175b036472f6 ("drm/i915: fix Sphinx indentation
warning") in drm-next.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/gt/uc/intel_huc.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> index ddd146265beb..fa70defcb5b2 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> @@ -26,6 +26,7 @@
> * The kernel driver is only responsible for loading the HuC firmware and
> * triggering its security authentication. This is done differently depending
> * on the platform:
> + *
> * - older platforms (from Gen9 to most Gen12s): the load is performed via DMA
> * and the authentication via GuC
> * - DG2: load and authentication are both performed via GSC.
> @@ -33,6 +34,7 @@
> * not-DG2 older platforms), while the authentication is done in 2-steps,
> * a first auth for clear-media workloads via GuC and a second one for all
> * workloads via GSC.
> + *
> * On platforms where the GuC does the authentication, to correctly do so the
> * HuC binary must be loaded before the GuC one.
> * Loading the HuC is optional; however, not using the HuC might negatively
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-08-21 16:23 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-21 15:02 [PATCH] gpu: drm: i915: fix documentation style Ricardo B. Marliere
2023-08-21 16:22 ` Jani Nikula [this message]
2023-08-21 21:00 ` Ceraolo Spurio, Daniele
2023-08-22 21:50 ` Vivi, Rodrigo
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