[PATCH v2 1/1] usb: dwc3: fix Clear Stall EP command failure

[PATCH v2 1/1] usb: dwc3: fix Clear Stall EP command failure

[Lu Baolu]

Commit 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear
Stall EP command") sets ClearPendIN bit for all IN endpoints of
v2.60a+ cores. This causes ClearStall command fails on 2.60+ cores
operating in HighSpeed mode.

In page 539 of 2.60a specification:

"When issuing Clear Stall command for IN endpoints in SuperSpeed
mode, the software must set the "ClearPendIN" bit to '1' to
clear any pending IN transcations, so that the device does not
expect any ACK TP from the host for the data sent earlier."

It's obvious that we only need to apply this rule to those IN
endpoints that currently operating in SuperSpeed mode.

Fixes: 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear Stall EP command")
Cc: <stable@vger.kernel.org> # v4.7+
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 v1->v2:
 - check current instead of maximum speed
 - improve the commit message

 drivers/usb/dwc3/gadget.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 7a8d3d8..4fd9fda 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -348,7 +348,8 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
 	 * IN transfers due to a mishandled error condition. Synopsys
 	 * STAR 9000614252.
 	 */
-	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
+	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A) &&
+	    (dwc->gadget.speed >= USB_SPEED_SUPER))
 		cmd |= DWC3_DEPCMD_CLEARPENDIN;
 
 	memset(&params, 0, sizeof(params));
-- 
2.1.4

Re: [PATCH v2 1/1] usb: dwc3: fix Clear Stall EP command failure

[Felipe Balbi]

Hi John,

Lu Baolu <baolu.lu@linux.intel.com> writes:
> Commit 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear
> Stall EP command") sets ClearPendIN bit for all IN endpoints of
> v2.60a+ cores. This causes ClearStall command fails on 2.60+ cores
> operating in HighSpeed mode.
>
> In page 539 of 2.60a specification:
>
> "When issuing Clear Stall command for IN endpoints in SuperSpeed
> mode, the software must set the "ClearPendIN" bit to '1' to
> clear any pending IN transcations, so that the device does not
> expect any ACK TP from the host for the data sent earlier."
>
> It's obvious that we only need to apply this rule to those IN
> endpoints that currently operating in SuperSpeed mode.
>
> Fixes: 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear Stall EP command")
> Cc: <stable@vger.kernel.org> # v4.7+
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
>  v1->v2:
>  - check current instead of maximum speed
>  - improve the commit message
>
>  drivers/usb/dwc3/gadget.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
> index 7a8d3d8..4fd9fda 100644
> --- a/drivers/usb/dwc3/gadget.c
> +++ b/drivers/usb/dwc3/gadget.c
> @@ -348,7 +348,8 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
>  	 * IN transfers due to a mishandled error condition. Synopsys
>  	 * STAR 9000614252.
>  	 */
> -	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
> +	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A) &&
> +	    (dwc->gadget.speed >= USB_SPEED_SUPER))
>  		cmd |= DWC3_DEPCMD_CLEARPENDIN;
>  
>  	memset(&params, 0, sizeof(params));

since this is patching what you changed, can you have a look? It makes
sense to me.

-- 
balbi

Re: [PATCH v2 1/1] usb: dwc3: fix Clear Stall EP command failure

[John Youn]

On 9/9/2016 12:47 AM, Felipe Balbi wrote:
> 
> Hi John,
> 
> Lu Baolu <baolu.lu@linux.intel.com> writes:
>> Commit 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear
>> Stall EP command") sets ClearPendIN bit for all IN endpoints of
>> v2.60a+ cores. This causes ClearStall command fails on 2.60+ cores
>> operating in HighSpeed mode.
>>
>> In page 539 of 2.60a specification:
>>
>> "When issuing Clear Stall command for IN endpoints in SuperSpeed
>> mode, the software must set the "ClearPendIN" bit to '1' to
>> clear any pending IN transcations, so that the device does not
>> expect any ACK TP from the host for the data sent earlier."
>>
>> It's obvious that we only need to apply this rule to those IN
>> endpoints that currently operating in SuperSpeed mode.
>>
>> Fixes: 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear Stall EP command")
>> Cc: <stable@vger.kernel.org> # v4.7+
>> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
>> ---
>>  v1->v2:
>>  - check current instead of maximum speed
>>  - improve the commit message
>>
>>  drivers/usb/dwc3/gadget.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>> index 7a8d3d8..4fd9fda 100644
>> --- a/drivers/usb/dwc3/gadget.c
>> +++ b/drivers/usb/dwc3/gadget.c
>> @@ -348,7 +348,8 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
>>  	 * IN transfers due to a mishandled error condition. Synopsys
>>  	 * STAR 9000614252.
>>  	 */
>> -	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
>> +	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A) &&
>> +	    (dwc->gadget.speed >= USB_SPEED_SUPER))
>>  		cmd |= DWC3_DEPCMD_CLEARPENDIN;
>>  
>>  	memset(&params, 0, sizeof(params));
> 
> since this is patching what you changed, can you have a look? It makes
> sense to me.
> 

Looks good to me

John