From: Thomas Gleixner <tglx@kernel.org>
To: Biju <biju.das.au@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
linux-kernel@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Biju Das <biju.das.au@gmail.com>,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v5 08/15] irqchip/renesas-rzg2l: Split rzfive_tint_irq_endisable() into separate IRQ and TINT helpers
Date: Fri, 20 Mar 2026 09:50:33 +0100 [thread overview]
Message-ID: <87ldfmlw9y.ffs@tglx> (raw)
In-Reply-To: <20260311192459.609064-9-biju.das.jz@bp.renesas.com>
On Wed, Mar 11 2026 at 19:24, Biju wrote:
> +static void rzfive_tint_endisable(struct irq_data *d, bool enable)
> +{
> + struct rzg2l_irqc_priv *priv = irq_data_to_priv(d);
> + unsigned int hwirq = irqd_to_hwirq(d);
> +
stray newline/ The previous comment about data types applies here too.
> + u32 offset = hwirq - IRQC_TINT_START;
> + u32 tssr_offset = TSSR_OFFSET(offset);
> + u8 tssr_index = TSSR_INDEX(offset);
> + u32 reg;
> +
> + raw_spin_lock(&priv->lock);
guard()
Thanks,
tglx
next prev parent reply other threads:[~2026-03-20 8:50 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 19:24 [PATCH v5 00/15] Add RZ/G3L IRQC support Biju
2026-03-11 19:24 ` [PATCH v5 01/15] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Use pattern for interrupt-names Biju
2026-03-11 19:24 ` [PATCH v5 02/15] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3L SoC Biju
2026-03-14 0:06 ` Rob Herring (Arm)
2026-03-11 19:24 ` [PATCH v5 03/15] irqchip/renesas-rzg2l: Drop redundant IRQC_TINT_START check in rzg2l_irqc_alloc() Biju
2026-03-11 19:24 ` [PATCH v5 04/15] irqchip/renesas-rzg2l: Replace single irq_chip with per-region irq_chip instances Biju
2026-03-11 19:24 ` [PATCH v5 05/15] irqchip/renesas-rzg2l: Split EOI handler into separate IRQ and TINT functions Biju
2026-03-20 8:42 ` Thomas Gleixner
2026-03-20 15:51 ` Biju Das
2026-03-11 19:24 ` [PATCH v5 06/15] irqchip/renesas-rzg2l: Split set_type " Biju
2026-03-11 19:24 ` [PATCH v5 07/15] irqchip/renesas-rzg2l: Replace rzg2l_irqc_irq_{enable,disable} with TINT-specific handlers Biju
2026-03-20 8:48 ` Thomas Gleixner
2026-03-20 16:02 ` Biju Das
2026-03-11 19:24 ` [PATCH v5 08/15] irqchip/renesas-rzg2l: Split rzfive_tint_irq_endisable() into separate IRQ and TINT helpers Biju
2026-03-20 8:50 ` Thomas Gleixner [this message]
2026-03-20 16:03 ` Biju Das
2026-03-11 19:24 ` [PATCH v5 09/15] irqchip/renesas-rzg2l: Split rzfive_irqc_{mask,unmask} into separate IRQ and TINT handlers Biju
2026-03-11 19:24 ` [PATCH v5 10/15] irqchip/renesas-rzg2l: Dynamically allocate fwspec array Biju
2026-03-11 19:24 ` [PATCH v5 11/15] irqchip/renesas-rzg2l: Drop IRQC_NUM_IRQ macro Biju
2026-03-11 19:24 ` [PATCH v5 12/15] irqchip/renesas-rzg2l: Drop IRQC_TINT_START macro Biju
2026-03-11 19:24 ` [PATCH v5 13/15] irqchip/renesas-rzg2l: Drop IRQC_IRQ_COUNT macro Biju
2026-03-11 19:24 ` [PATCH v5 14/15] irqchip/renesas-rzg2l: Add RZ/G3L support Biju
2026-03-11 19:24 ` [PATCH v5 15/15] irqchip/renesas-rzg2l: Add shared interrupt support Biju
2026-03-20 9:00 ` Thomas Gleixner
2026-03-20 16:07 ` Biju Das
2026-03-21 12:13 ` Biju Das
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