Re: [PATCH] irqchip/riscv-imsic: Fix irq migration failure issue when cpu hotplug.

[Thomas Gleixner <tglx@kernel.org>]

On Tue, Feb 03 2026 at 22:39, Anup Patel wrote:
> On Tue, Feb 3, 2026 at 7:05 PM Thomas Gleixner <tglx@kernel.org> wrote:
>> >  static void imsic_msi_update_msg(struct irq_data *d, struct imsic_vector *vec)
>> >  {
>> >       struct msi_msg msg = { };
>> > +     struct irq_chip *irq_chip = irq_data_get_irq_chip(d);
>> > +
>> > +     if (!irq_chip->irq_write_msi_msg)
>> > +             return;
>>
>> I have no idea how this ever worked. The irq_data pointer belongs to the
>> IMSIC base domain, which definitely does not have a irq_write_msi_msg()
>> callback and never can have one.
>
> The imsic_irq_set_affinity() passes irq_get_irq_data(d->irq) as
> irq_data pointer to imsic_msi_update_msg() expecting it to be
> the top-level irq_data. The imsic_msi_update_msg() assumes
> that the top-level irq_data always has irq_write_msi_msg() but if
> this assumption is not correct then we need an if-check over here.

Indeed. I misread that part and yes, you can assume that the top level
domain has a write MSI callback because that's what this MSI parent
domain is about.

We might check for that in the msi lib. See below

Thanks,

        tglx
---        
--- a/drivers/irqchip/irq-msi-lib.c
+++ b/drivers/irqchip/irq-msi-lib.c
@@ -48,6 +48,9 @@ bool msi_lib_init_dev_msi_info(struct de
 		return false;
 	}
 
+	if (WARN__ON_ONCE(!chip->irq_write_msi_msg))
+		return false;
+
 	required_flags = pops->required_flags;
 
 	/* Is the target domain bus token supported? */