Re: [PATCH RESEND] drm/bridge: anx7625: Use common macros for DP power sequencing commands

[Jani Nikula <jani.nikula@linux.intel.com>]

On Tue, 11 Jul 2023, Chen-Yu Tsai <wenst@chromium.org> wrote:
> On Mon, Jul 10, 2023 at 6:32 PM Jani Nikula <jani.nikula@linux.intel.com> wrote:
>>
>> On Mon, 10 Jul 2023, Chen-Yu Tsai <wenst@chromium.org> wrote:
>> > The DRM DP code has macros for the DP power sequencing commands. Use
>> > them in the anx7625 driver instead of raw numbers.
>> >
>> > Fixes: 548b512e144f ("drm/bridge: anx7625: send DPCD command to downstream")
>> > Fixes: 27f26359de9b ("drm/bridge: anx7625: Set downstream sink into normal status")
>> > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
>> > Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
>> > ---
>> > Collected tags and rebased on v6.5-rc1.
>> >
>> >  drivers/gpu/drm/bridge/analogix/anx7625.c | 8 ++++----
>> >  1 file changed, 4 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
>> > index 8b985efdc086..9db3784cb554 100644
>> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
>> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
>> > @@ -931,8 +931,8 @@ static void anx7625_dp_start(struct anx7625_data *ctx)
>> >
>> >       dev_dbg(dev, "set downstream sink into normal\n");
>> >       /* Downstream sink enter into normal mode */
>> > -     data = 1;
>> > -     ret = anx7625_aux_trans(ctx, DP_AUX_NATIVE_WRITE, 0x000600, 1, &data);
>> > +     data = DP_SET_POWER_D0;
>> > +     ret = anx7625_aux_trans(ctx, DP_AUX_NATIVE_WRITE, DP_SET_POWER, 1, &data);
>>
>> So you have code to implement the drm dp aux abstractions, why aren't
>> you using drm_dp_dpcd_writeb() and friends here?
>
> I didn't write the original code. Nor do I do much DP stuff. IIRC someone
> pointed out to me these had proper macros, so I converted them.
>
> Would you accept a follow-up patch to convert the AUX transfers to the
> DRM abstractions?

I believe they would be welcome, but I'm personally not familiar with
the driver in question.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center