From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1041C433F5 for ; Tue, 25 Jan 2022 18:18:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229919AbiAYSSm (ORCPT ); Tue, 25 Jan 2022 13:18:42 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:42558 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229819AbiAYSRz (ORCPT ); Tue, 25 Jan 2022 13:17:55 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0A5936159C for ; Tue, 25 Jan 2022 18:17:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 68A5CC340E0; Tue, 25 Jan 2022 18:17:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1643134673; bh=w8DhvSPrXEB9alnX3J3PnwweYaByIDz9SKl6VrLdkDA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=HjvX3UIiQXJM4UrqvgBGfUjgIDkaGQBjFtqFbHuVcaiCPU740K/5Mmd7z/dXhAbJc bvKCGA1M9ZK9S5PvSlOI0jxSwnokPgClj0sPR1wr9bPfNM+zgT+GxkokeDchLpGxyT +exMiXzRd19srOzVHZ82cpaCm4514fDYkhUH6TrLUYCCD7Wv35IW8wkhcEv5StA3jP kgBzuLikQQKoCFedzHdR/aa11wZi6aQTtH5P8xd1GYklicvg3To0eG9d5qU7l4H0B/ EfxHsMnxQXp4J0Oz7WTqXTjqjaGji7k/EuXec1/wGcSxI2KU6KQkWGKhJMO1ZnZ5yW 055wtQtaG+0zw== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nCQO7-002zhb-7B; Tue, 25 Jan 2022 18:17:51 +0000 Date: Tue, 25 Jan 2022 18:17:50 +0000 Message-ID: <87lez37k8h.wl-maz@kernel.org> From: Marc Zyngier To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Daniel Lezcano , Rob Herring , Atish Patra , Alistair Francis , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/6] irqchip/riscv-intc: Set intc domain as the default host In-Reply-To: <20220125054217.383482-3-apatel@ventanamicro.com> References: <20220125054217.383482-1-apatel@ventanamicro.com> <20220125054217.383482-3-apatel@ventanamicro.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: apatel@ventanamicro.com, palmer@dabbelt.com, paul.walmsley@sifive.com, tglx@linutronix.de, daniel.lezcano@linaro.org, robh+dt@kernel.org, atishp@atishpatra.org, Alistair.Francis@wdc.com, anup@brainfault.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 25 Jan 2022 05:42:13 +0000, Anup Patel wrote: > > We have quite a few RISC-V drivers (such as RISC-V SBI IPI driver, > RISC-V timer driver, RISC-V PMU driver, etc) which do not have a > dedicated DT/ACPI fwnode. This patch makes intc domain as the default > host so that these drivers can directly create local interrupt mapping > using standardized local interrupt numbers > > Signed-off-by: Anup Patel > --- > drivers/clocksource/timer-riscv.c | 17 +---------------- > drivers/irqchip/irq-riscv-intc.c | 9 +++++++++ > 2 files changed, 10 insertions(+), 16 deletions(-) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 1767f8bf2013..dd6916ae6365 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -102,8 +102,6 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id) > static int __init riscv_timer_init_dt(struct device_node *n) > { > int cpuid, hartid, error; > - struct device_node *child; > - struct irq_domain *domain; > > hartid = riscv_of_processor_hartid(n); > if (hartid < 0) { > @@ -121,20 +119,7 @@ static int __init riscv_timer_init_dt(struct device_node *n) > if (cpuid != smp_processor_id()) > return 0; > > - domain = NULL; > - child = of_get_compatible_child(n, "riscv,cpu-intc"); > - if (!child) { > - pr_err("Failed to find INTC node [%pOF]\n", n); > - return -ENODEV; > - } > - domain = irq_find_host(child); > - of_node_put(child); > - if (!domain) { > - pr_err("Failed to find IRQ domain for node [%pOF]\n", n); > - return -ENODEV; > - } > - > - riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER); > + riscv_clock_event_irq = irq_create_mapping(NULL, RV_IRQ_TIMER); > if (!riscv_clock_event_irq) { > pr_err("Failed to map timer interrupt for node [%pOF]\n", n); > return -ENODEV; > diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c > index b65bd8878d4f..9f0a7a8a5c4d 100644 > --- a/drivers/irqchip/irq-riscv-intc.c > +++ b/drivers/irqchip/irq-riscv-intc.c > @@ -125,6 +125,15 @@ static int __init riscv_intc_init(struct device_node *node, > return rc; > } > > + /* > + * Make INTC as the default domain which will allow drivers > + * not having dedicated DT/ACPI fwnode (such as RISC-V SBI IPI > + * driver, RISC-V timer driver, RISC-V PMU driver, etc) can > + * directly create local interrupt mapping using standardized > + * local interrupt numbers. > + */ > + irq_set_default_host(intc_domain); No, please. This really is a bad idea. This sort of catch-all have constantly proven to be a nuisance, because they discard all the topology information. Eventually, you realise that you need to know where this is coming from, but it really is too late. I'd rather you *synthesise* a fwnode (like ACPI does) rather then do this. M. -- Without deviation from the norm, progress is not possible.