From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECF08C4320A for ; Sun, 8 Aug 2021 10:45:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AF0C96101C for ; Sun, 8 Aug 2021 10:45:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230236AbhHHKkx (ORCPT ); Sun, 8 Aug 2021 06:40:53 -0400 Received: from mail.kernel.org ([198.145.29.99]:56754 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229613AbhHHKkv (ORCPT ); Sun, 8 Aug 2021 06:40:51 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EF1F261019; Sun, 8 Aug 2021 10:40:32 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mCgEI-003cS2-Na; Sun, 08 Aug 2021 11:40:30 +0100 Date: Sun, 08 Aug 2021 11:40:30 +0100 Message-ID: <87lf5c1aox.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: Linus Walleij , Linux ARM , linux-kernel , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Peter Shier , Raghavendra Rao Ananta , Ricardo Koller Subject: Re: [PATCH v2] clocksource/arm_arch_timer: Fix masking for high freq counters In-Reply-To: References: <20210807191428.3488948-1-oupton@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oupton@google.com, linus.walleij@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, daniel.lezcano@linaro.org, tglx@linutronix.de, pshier@google.com, rananta@google.com, ricarkol@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 08 Aug 2021 02:14:35 +0100, Oliver Upton wrote: > The only other sane idea that I could come up with is providing this > information to the kernel through DT, although that would leave ACPI > systems behind. It also has the disadvantage that a large number of DT timer nodes are a mess of cargo-culted, copy-pasted idioms, and that adding another property would only make it worse. I'm more confident with something that can be either: - checked from EL2 using CNTVOFF, which is complicated, doesn't work at EL1, and leaves us in a weird state if we have different counter width views in the system (BL is such a wonderful concept) - or computed from first principle based on the requirements of the architecture. Thanks, M. -- Without deviation from the norm, progress is not possible.