Re: [RFC PATCH v4 0/5] Renesas RZ/G2L IRQC support

Marc Zyngier
2022-03-17T09:23:19Z

On Thu, 17 Mar 2022 08:46:14 +0000,
Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Thu, Mar 17, 2022 at 5:43 AM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> >
> > Hi All,
> >
> > The RZ/G2L Interrupt Controller is a front-end for the GIC found on
> > Renesas RZ/G2L SoC's with below pins:
> > - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI interrupts
> > - GPIO pins used as external interrupt input pins out of GPIOINT0-122 a
> > maximum of only 32 can be mapped to 32 GIC SPI interrupts,
> > - NMI edge select.
> >
> What I want to know now is whether it is going to collide with Marc's
> series about GPIO IRQ chip constification?

Probably, but the current scheme will still be alive for some time
(you'll need a couple of cycles to sort out all the drivers).

Worse case, this can be fixed at merge time.

M.

--
Without deviation from the norm, progress is not possible.