From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB4F3C433F5 for ; Wed, 29 Sep 2021 07:20:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AC18F61357 for ; Wed, 29 Sep 2021 07:20:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244592AbhI2HWT (ORCPT ); Wed, 29 Sep 2021 03:22:19 -0400 Received: from mail.kernel.org ([198.145.29.99]:35600 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244561AbhI2HWS (ORCPT ); Wed, 29 Sep 2021 03:22:18 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C32E2613C8; Wed, 29 Sep 2021 07:20:37 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mVTtL-00Dfij-RH; Wed, 29 Sep 2021 08:20:36 +0100 Date: Wed, 29 Sep 2021 08:20:35 +0100 Message-ID: <87mtnvu9to.wl-maz@kernel.org> From: Marc Zyngier To: Pingfan Liu Cc: Mark Rutland , Pingfan Liu , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Joey Gouly , Sami Tolvanen , Julien Thierry , Thomas Gleixner , Yuichi Ito , linux-kernel@vger.kernel.org Subject: Re: [PATCHv2 4/5] irqchip/GICv3: let gic_handle_irq() utilize irqentry on arm64 In-Reply-To: References: <20210924132837.45994-1-kernelfans@gmail.com> <20210924132837.45994-5-kernelfans@gmail.com> <20210928091053.GD1924@C02TD0UTHF1T.local> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: piliu@redhat.com, mark.rutland@arm.com, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, samitolvanen@google.com, julien.thierry@arm.com, tglx@linutronix.de, ito-yuichi@fujitsu.com, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 29 Sep 2021 04:10:11 +0100, Pingfan Liu wrote: > > On Tue, Sep 28, 2021 at 10:10:53AM +0100, Mark Rutland wrote: > > On Fri, Sep 24, 2021 at 09:28:36PM +0800, Pingfan Liu wrote: > > > The call to rcu_irq_enter() originated from gic_handle_irq() is > > > redundant now, since arm64 has enter_from_kernel_mode() akin to > > > irqenter_entry(), which has already called rcu_irq_enter(). > > > > Here I think you're referring to the call in handle_domain_irq(), but > > that isn't clear from the commit message. > > > Yes, and I will make it clear in V2. > > > > Based on code analysis, the redundant can raise some mistake, e.g. > > > rcu_data->dynticks_nmi_nesting inc 2, which causes > > > rcu_is_cpu_rrupt_from_idle() unexpected. > > > > > > So eliminate the call to irq_enter() in handle_domain_irq(). And > > > accordingly supplementing irq_enter_rcu(). > > > > We support many more irqchips on arm64, and GICv3 can be used on regular > > 32-bit arm, so this isn't right. Moving the irq_enter_rcu() call > > into the GICv3 driver specifically breaks other drivers on arm64 by > > removing the call, and breaks the GICv3 driver on arm by adding a > > duplicate call. > > > Oops. I forgot to protect the code in GICv3 with CONFIG_HAVE_ARCH_IRQENTRY > > > It looks like this should live in do_interrupt_handler() in > > arch/arm64/kernel/entry-common.c, e.g. > > > > | static void do_interrupt_handler(struct pt_regs *regs, > > | void (*handler)(struct pt_regs *)) > > | { > > | irq_enter_rcu(); > > | if (on_thread_stack()) > > | call_on_irq_stack(regs, handler); > > | else > > | handler(regs); > > | irq_exit_rcu(); > > | } > > > > ... unless there's some problem with that? > > > Yeah, do_interrupt_handler() is a more suitable place. But to resolve > the performance regression of rescheduling IPI [1], it is badly demanded to > distinguish irqnr before calling irq_enter_rcu() (please see 5/5 and [2] > for the context). So it is a compromise to host the code in GICv3. > > Any good idea? There is no way we are going to single out a particular interrupt controller. As for the "regression", we'll have to look at the numbers once we have fixed the whole infrastructure. M. -- Without deviation from the norm, progress is not possible.