Re: [PATCH v5 07/15] irqchip/renesas-rzg2l: Replace rzg2l_irqc_irq_{enable,disable} with TINT-specific handlers

[Thomas Gleixner <tglx@kernel.org>]

On Wed, Mar 11 2026 at 19:24, Biju wrote:
>  static void rzg2l_tint_irq_endisable(struct irq_data *d, bool enable)
>  {
> +	struct rzg2l_irqc_priv *priv = irq_data_to_priv(d);
>  	unsigned int hw_irq = irqd_to_hwirq(d);
> +	u32 offset = hw_irq - IRQC_TINT_START;
> +	u32 tssr_offset = TSSR_OFFSET(offset);
> +	u8 tssr_index = TSSR_INDEX(offset);

u32, u8? What's the point of those data types. We use uNN usually to
explicitely denote that this is hardware related. All three variables
are just for calculation and can simply use unsigned int, no?

> +	u32 reg;

This one makes sense.


> +	raw_spin_lock(&priv->lock);

This one can simply use

     guard(raw_spinlock)(&priv->lock);

> +	reg = readl_relaxed(priv->base + TSSR(tssr_index));
> +	if (enable)
> +		reg |= TIEN << TSSEL_SHIFT(tssr_offset);
> +	else
> +		reg &= ~(TIEN << TSSEL_SHIFT(tssr_offset));
> +	writel_relaxed(reg, priv->base + TSSR(tssr_index));
> +	raw_spin_unlock(&priv->lock);