Re: bisected: [PATCH V4] x86/apic: Always explicitly disarm TSC-deadline timer

[Thomas Gleixner <tglx@linutronix.de>]

On Thu, Nov 28 2024 at 20:18, Sergey Senozhatsky wrote:
>> Disable the TSC Deadline timer in lapic_timer_shutdown() by writing to
>> MSR_IA32_TSC_DEADLINE when in TSC-deadline mode. Also avoid writing
>> to the initial-count register (APIC_TMICT) which is ignored in
>> TSC-deadline mode.
>
> So this commit hit stable and we now see section mismatch errors:
>
> // stripped
>
> WARNING: vmlinux.o(__ex_table+0x447c): Section mismatch in reference from the (unknown reference) (unknown) to the (unknown reference) .irqentry.text:(unknown)
> The relocation at __ex_table+0x447c references
> section ".irqentry.text" which is not in the list of
> authorized sections.
>
> WARNING: vmlinux.o(__ex_table+0x4480): Section mismatch in reference from the (unknown reference) (unknown) to the (unknown reference) .irqentry.text:(unknown)
> The relocation at __ex_table+0x4480 references
> section ".irqentry.text" which is not in the list of
> authorized sections.
>
> FATAL: modpost: Section mismatches detected.
>
> Specifically because of wrmsrl.
>
> I'm aware of the section mismatch errors on linux-5.4 (I know), not
> aware of any other stable versions (but I haven't checked).  Is this
> something specific to linux-5.4?

So it seems the compiler inlines the inner guts of
sysvec_apic_timer_interrupt() and local_apic_timer_interrupt().

Can you try the patch below?

Thanks,

        tglx
---
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1007,7 +1007,7 @@ void setup_secondary_APIC_clock(void)
 /*
  * The guts of the apic timer interrupt
  */
-static void local_apic_timer_interrupt(void)
+static noinline void local_apic_timer_interrupt(void)
 {
 	struct clock_event_device *evt = this_cpu_ptr(&lapic_events);