Re: [PATCH 7/7] powerpc: add support for PREEMPT_LAZY

[Michael Ellerman <mpe@ellerman.id.au>]

Shrikanth Hegde <sshegde@linux.ibm.com> writes:
> On 10/10/24 23:40, Ankur Arora wrote:
>> 
>> Sebastian Andrzej Siewior <bigeasy@linutronix.de> writes:
>> 
>>> On 2024-10-09 09:54:11 [-0700], Ankur Arora wrote:
>>>> From: Shrikanth Hegde <sshegde@linux.ibm.com>
>>>>
>>>> Add PowerPC arch support for PREEMPT_LAZY by defining LAZY bits.
>> 
...
>>>> diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
>>>> index 6ebca2996f18..ae7793dae763 100644
>>>> --- a/arch/powerpc/include/asm/thread_info.h
>>>> +++ b/arch/powerpc/include/asm/thread_info.h
>>>> @@ -117,11 +117,14 @@ void arch_setup_new_exec(void);
>>>>   #endif
>>>>   #define TIF_POLLING_NRFLAG	19	/* true if poll_idle() is polling TIF_NEED_RESCHED */
>>>>   #define TIF_32BIT		20	/* 32 bit binary */
>>>> +#define TIF_NEED_RESCHED_LAZY	21	/* Lazy rescheduling */
>>>
>>> I don't see any of the bits being used in assembly anymore.
>>> If you group the _TIF_USER_WORK_MASK bits it a single 16 bit block then
>>> the compiler could issue a single andi.
>
> That's a good find. since by default powerpc uses 4 byte fixed ISA, 
> compiler would generate extra code for _TIF_USER_WORK_MASK. Looked at 
> the objdump. It indeed does.
>
> I see that value 9 isn't being used. It was last used for TIF_NOHZ which 
> is removed now. That value could be used for RESCHED_LAZY. Using that 
> value i see the code generated is similar to what we have now.
>
> +mpe

Yep, 9 looks good.

I don't think it *really* matters that it's a single andi. on modern
CPUs, but seeing as bit 9 is free we may as well use it.

cheers