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bh=bYuy0gE/Csnq6CPjPynB+thwHl+NK+QDx3CCg79tANw=; b=3YvGKIkulMjWSxMFtwlNIAzmYpBeHw1URc4C+ycSUDYGdD7pxLEXc2TowKAXLwT5dEjtNa BxO24vkHV9ZJ3ucu78nX1lVOgRX/F8a5bbW+3kykcbckVInhZ45OmFFv2CWKJwnMXGxg3i YWKNX2ZprZdXQD1B+hreQXeebltGuXPo/mMusaHNZu1RbA2KpuXnaKbs6Q9UrVZ7a7H10G SDWTc2wM7i1QWGTW+Gftr/SQujQNlUSYzBDX9dsaPJclyKdaCGPDDoyPurjD70hUfYbZPv 6sGlVTfnhOANxZxdP+n2f9Am6kHPAjEnTANBJPU0WLft8WIHS5OMApmbjXupnQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1725983896; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=bYuy0gE/Csnq6CPjPynB+thwHl+NK+QDx3CCg79tANw=; b=nOXDYXyK81ou96bJppft20Co7EtkQ9rWp78zV/nliuCMzMamIfannFVkrWzA+tpOrsUzs3 WgA9TSp9xOC4dICg== To: Stanimir Varbanov , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Broadcom internal kernel review list Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Jim Quinlan , Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , kw@linux.com, Philipp Zabel , Andrea della Porta , Phil Elwell , Jonathan Bell , Stanimir Varbanov Subject: Re: [PATCH v2 -next 03/11] irqchip: mip: Add Broadcom bcm2712 MSI-X interrupt controller In-Reply-To: <20240910151845.17308-4-svarbanov@suse.de> References: <20240910151845.17308-1-svarbanov@suse.de> <20240910151845.17308-4-svarbanov@suse.de> Date: Tue, 10 Sep 2024 17:58:16 +0200 Message-ID: <87o74va4br.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Tue, Sep 10 2024 at 18:18, Stanimir Varbanov wrote: > + > +struct mip_priv { > + /* used to protect bitmap alloc/free */ > + spinlock_t lock; > + void __iomem *base; > + u64 msg_addr; > + u32 msi_base; > + u32 num_msis; > + unsigned long *bitmap; > + struct irq_domain *parent; https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#struct-declarations-and-initializers And please read the rest of the document too. > +}; > + > +static void mip_mask_msi_irq(struct irq_data *d) > +{ > + pci_msi_mask_irq(d); > + irq_chip_mask_parent(d); > +} > + > +static void mip_unmask_msi_irq(struct irq_data *d) > +{ > + pci_msi_unmask_irq(d); > + irq_chip_unmask_parent(d); This is asymmetric vs. mask(), but that's just the usual copy & pasta problem. > +} > +static int mip_init_domains(struct mip_priv *priv, struct device_node *np) > +{ > + struct irq_domain *middle_domain, *msi_domain; > + > + middle_domain = irq_domain_add_hierarchy(priv->parent, 0, > + priv->num_msis, np, > + &mip_middle_domain_ops, > + priv); > + if (!middle_domain) > + return -ENOMEM; > + > + msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(np), > + &mip_msi_domain_info, > + middle_domain); > + if (!msi_domain) { > + irq_domain_remove(middle_domain); > + return -ENOMEM; > + } This is not much different. Please convert this to a proper MSI parent domain and let the PCI/MSI core handle the PCI/MSI part. See https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/log/?h=irq-msi-2024-07-22 for reference. Thanks, tglx