Re: [PATCH v5 0/7] KVM: x86: Hyper-V invariant TSC control feature

[Vitaly Kuznetsov <vkuznets@redhat.com>]

Sean Christopherson <seanjc@google.com> writes:

> On Thu, Oct 13, 2022, Vitaly Kuznetsov wrote:
>> Normally, genuine Hyper-V doesn't expose architectural invariant TSC
>> (CPUID.80000007H:EDX[8]) to its guests by default. A special PV MSR
>> (HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x40000118) and corresponding CPUID
>> feature bit (CPUID.0x40000003.EAX[15]) were introduced. When bit 0 of the
>> PV MSR is set, invariant TSC bit starts to show up in CPUID. When the 
>> feature is exposed to Hyper-V guests, reenlightenment becomes unneeded.
>> 
>> Note: strictly speaking, KVM doesn't have to have the feature as exposing
>> raw invariant TSC bit (CPUID.80000007H:EDX[8]) also seems to work for
>> modern Windows versions. The feature is, however, tiny and straitforward
>> and gives additional flexibility so why not.
>> 
>> Vitaly Kuznetsov (7):
>>   x86/hyperv: Add HV_EXPOSE_INVARIANT_TSC define
>>   KVM: x86: Add a KVM-only leaf for CPUID_8000_0007_EDX
>>   KVM: x86: Hyper-V invariant TSC control
>>   KVM: selftests: Rename 'msr->available' to 'msr->fault_exepected' in
>>     hyperv_features test
>>   KVM: selftests: Convert hyperv_features test to using
>>     KVM_X86_CPU_FEATURE()
>>   KVM: selftests: Test that values written to Hyper-V MSRs are preserved
>>   KVM: selftests: Test Hyper-V invariant TSC control
>
> For the series, in case Paolo ends up grabbing this:
>
> Reviewed-by: Sean Christopherson <seanjc@google.com>
>

I completely forgot about this one! Any chance it can still be queueed
for 6.2? Thanks!

-- 
Vitaly