From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 203B61E49F for ; Mon, 23 Feb 2026 13:02:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771851774; cv=none; b=D0Ygubt5PbCGacfCh5EzHVz3eVblNI6ZcTsJndWrErzBWCk02WtDQeQUzSEU7vPeglK8w2dBHfHcYEIfxD6jJvUb8SlTorX9DjcVTGyTUkuTSfQ5mv7F8Ub83tOtKUf+Er7pkFFLKfXew8qnTtWscNXOJot8gDtJb7jZrYDqa/4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771851774; c=relaxed/simple; bh=iZBlwQliLKOaK+xvvX3FOn/PA3LT6MHuwUPt+gChPDg=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=tQ/G6d+x0YoUWdtEtF1VrLXYYdlsVeqJt4k5qIKQRNXckvnJvGwJJc7hk+obIurk3lbDrf11fWOEvMqh/VGsdCks8KVUqQBZoL4o6WPa3RTaXLsZuX5C5on2jiDJe7l5uW56P44vc4ISj4OOaUn7QuGwyIclgnkhlTSPwxCpCbo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EACiBWri; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EACiBWri" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3AC47C19424; Mon, 23 Feb 2026 13:02:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771851773; bh=iZBlwQliLKOaK+xvvX3FOn/PA3LT6MHuwUPt+gChPDg=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=EACiBWriChy1jxD1pIwPsXwtgGcD9o364heVNUAxRBZ1sQkq+GJjO13PgypgojArv +q3mxYpshrSqNHLUgfb8A2e5btCOVZs8KrKs/USVUB/GT97HWBgkwSNPGj/vwbLlge CMX2UxlRJW+P7yxlkx+v8cnIEKQ+f25YYcsFho4wincbwYzmtGLFxgIfvd75uFSMdT zSlUFnKsnPA72515URXnT7URdo00dBNZWh7eWWBfRyRtc0Pyca3knsGhf2aRTzLlVP DFlEQ5BtDf9kMAv/DpHEmmk8soywcgeHB86IrDhR4OkzbMDsopTUbzbZEqpOOuU/si vr8QCRbyNJryQ== From: Thomas Gleixner To: Marc Zyngier Cc: Ioana Ciornei , "Christophe Leroy (CS GROUP)" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH 3/6] irqchip/gic-v3-its: Add fsl_mc device plumbing to the msi-parent handling In-Reply-To: <86qzqbal69.wl-maz@kernel.org> References: <20260218135203.2267907-1-maz@kernel.org> <20260218135203.2267907-4-maz@kernel.org> <87seasv11z.ffs@tglx> <86qzqbal69.wl-maz@kernel.org> Date: Mon, 23 Feb 2026 14:02:50 +0100 Message-ID: <87pl5vvchx.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Mon, Feb 23 2026 at 09:01, Marc Zyngier wrote: > On Sun, 22 Feb 2026 22:57:44 +0000, > Thomas Gleixner wrote: >> This rejects as you are building against an unmerged change (I assume >> it's Lorenzos GIC5 stuff). I can fix it up when applying. > > That was against vanilla 6.19. I'll rebase on -rc1 to satisfy myself > that this is still doing the right thing after the ACPI crap fest, and > repost the result. Ah. The other way round :) My resolution is simple and it looks about right. Please note the cosmetic changes I did on the way :) Thanks, tglx --- --- a/drivers/irqchip/irq-gic-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-its-msi-parent.c @@ -5,6 +5,7 @@ // Copyright (C) 2022 Intel #include +#include #include #include @@ -186,10 +187,12 @@ static int its_pmsi_prepare(struct irq_d int nvec, msi_alloc_info_t *info) { struct msi_domain_info *msi_info; + int ret = 0; u32 dev_id; - int ret; - if (dev->of_node) + if (dev_is_fsl_mc(dev)) + dev_id = fsl_mc_get_msi_id(dev); + else if (dev->of_node) ret = of_pmsi_get_msi_info(domain->parent, dev, &dev_id, NULL); else ret = iort_pmsi_get_msi_info(dev, &dev_id, NULL);