From: Thomas Gleixner <tglx@linutronix.de>
To: paulmck@kernel.org, Marek Szyprowski <m.szyprowski@samsung.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Gabriele Monaco <gmonaco@redhat.com>,
Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
Michael Jeanson <mjeanson@efficios.com>,
Jens Axboe <axboe@kernel.dk>,
"Gautham R. Shenoy" <gautham.shenoy@amd.com>,
Florian Weimer <fweimer@redhat.com>,
Tim Chen <tim.c.chen@intel.com>,
Yury Norov <yury.norov@gmail.com>,
Shrikanth Hegde <sshegde@linux.ibm.com>
Subject: Re: [patch V5 09/20] cpumask: Cache num_possible_cpus()
Date: Sat, 22 Nov 2025 20:10:52 +0100 [thread overview]
Message-ID: <87pl99j32b.ffs@tglx> (raw)
In-Reply-To: <ad2a55f9-9bca-41bf-a6ec-efb23eaa778f@paulmck-laptop>
On Sat, Nov 22 2025 at 10:47, Paul E. McKenney wrote:
> On Fri, Nov 21, 2025 at 11:56:44PM +0100, Marek Szyprowski wrote:
>> On 19.11.2025 18:27, Thomas Gleixner wrote:
> My current guess is that the snapshot is taken too early, though I would
> be more confident of that if it happened on TREE01, in which CPUs come
> online quite late.
https://lore.kernel.org/all/87zf8ehyf7.ffs@tglx
next prev parent reply other threads:[~2025-11-22 19:10 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-19 17:26 [patch V5 00/20] sched: Rewrite MM CID management Thomas Gleixner
2025-11-19 17:26 ` [patch V5 01/20] sched/mmcid: Revert the complex " Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:26 ` [patch V5 02/20] sched/mmcid: Use proper data structures Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:26 ` [patch V5 03/20] sched/mmcid: Cacheline align MM CID storage Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:26 ` [patch V5 04/20] sched: Fixup whitespace damage Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:26 ` [patch V5 05/20] sched/mmcid: Move scheduler code out of global header Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:26 ` [patch V5 06/20] sched/mmcid: Prevent pointless work in mm_update_cpus_allowed() Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:26 ` [patch V5 07/20] cpumask: Introduce cpumask_weighted_or() Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:26 ` [patch V5 08/20] sched/mmcid: Use cpumask_weighted_or() Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 09/20] cpumask: Cache num_possible_cpus() Thomas Gleixner
2025-11-20 11:20 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-21 22:56 ` [patch V5 09/20] " Marek Szyprowski
2025-11-22 15:36 ` Thomas Gleixner
2025-11-22 16:24 ` Marek Szyprowski
2025-11-22 19:09 ` Paul E. McKenney
2025-11-23 19:03 ` [tip: core/rseq] cpu: Initialize __num_possible_cpus correctly tip-bot2 for Thomas Gleixner
2025-11-22 18:47 ` [patch V5 09/20] cpumask: Cache num_possible_cpus() Paul E. McKenney
2025-11-22 19:10 ` Thomas Gleixner [this message]
2025-11-22 0:27 ` Nathan Chancellor
2025-11-26 4:36 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 10/20] sched/mmcid: Convert mm CID mask to a bitmap Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 11/20] signal: Move MMCID exit out of sighand lock Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 12/20] sched/mmcid: Move initialization out of line Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 13/20] sched/mmcid: Provide precomputed maximal value Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 14/20] sched/mmcid: Serialize sched_mm_cid_fork()/exit() with a mutex Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 15/20] sched/mmcid: Introduce per task/CPU ownership infrastructure Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 16/20] sched/mmcid: Provide new scheduler CID mechanism Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 17/20] sched/mmcid: Provide CID ownership mode fixup functions Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 18/20] irqwork: Move data struct to a types header Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 19/20] sched/mmcid: Implement deferred mode change Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` tip-bot2 for Thomas Gleixner
2025-11-19 17:27 ` [patch V5 20/20] sched/mmcid: Switch over to the new mechanism Thomas Gleixner
2025-11-20 11:19 ` [tip: core/rseq] " tip-bot2 for Thomas Gleixner
2025-11-22 0:43 ` [patch V5 20/20] " Nathan Chancellor
2025-11-22 15:02 ` Thomas Gleixner
2025-11-22 16:54 ` Shrikanth Hegde
2025-11-23 19:03 ` [tip: core/rseq] sched/mmcid: Ensure that per CPU threshold is > 0 tip-bot2 for Thomas Gleixner
2025-11-26 4:36 ` [tip: core/rseq] sched/mmcid: Switch over to the new mechanism tip-bot2 for Thomas Gleixner
2026-01-28 0:01 ` [patch V5 00/20] sched: Rewrite MM CID management Ihor Solodrai
2026-01-28 8:46 ` Peter Zijlstra
2026-01-28 11:57 ` Thomas Gleixner
2026-01-28 12:58 ` Shrikanth Hegde
2026-01-28 13:56 ` Thomas Gleixner
2026-01-28 22:24 ` Thomas Gleixner
2026-01-28 22:33 ` Ihor Solodrai
2026-01-28 23:08 ` Ihor Solodrai
2026-01-29 17:06 ` Thomas Gleixner
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