From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48BDD17A58F; Mon, 28 Oct 2024 10:33:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730111633; cv=none; b=nrzqwcV/C8RAH4bhadzO2eq/I4KtNxetmsejrcfee9JdZt6bhDoyiuUcdWDRR7krl1sxvuIXraZA55Sf5seMzbVD9HDHQA3Bm4Q3W0tPKZiTfEDSY2bNKRDmQ36mIXmlGzomBW7KDxZTcvaTaHaBfKCoTlc3heFDD563EoaAJcg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730111633; c=relaxed/simple; bh=k1UfJG4wUYLjjRSm2i0WqLlzSLWlUdJsJRv0y6jMnQY=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=iRsBwM+cJ/rMNb+reeh4KYAnMe/qr4cs4hv39F0y+gGVtThIF+Yh2zJc4ebbR6SEctOrd9l69a2fS2kIH/HygxtLkt8fJGGTXXT3KjuOgq/FRKidhyJh8r1e9RRv4NysPht/MiA06gkXOn+bzH8JYUuXY7m0+6MERoJc/bGuL/k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hgfL0+Yy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hgfL0+Yy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BF655C4CEE3; Mon, 28 Oct 2024 10:33:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730111632; bh=k1UfJG4wUYLjjRSm2i0WqLlzSLWlUdJsJRv0y6jMnQY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=hgfL0+YyNiMIM2h1P8A3oeVeHsBbqnMU3gGTdAz9HE4+pvluUaN/CJ2ePYb4qnDuB W2fUmn7XuubX4Uodmth6W9y1txzjoT070YiSNLxEiSgBZgBEWL5VICAagn5xknN54L HNAWzDNtW06zdbs3tKx8Qv2R2OxWt2O+3TgTze3wx4ySpIGYtYn9GNoBg4/Go+5B/B 0R910iLHrk3VvztDn1MKR0UCTrWOEoPPzi8urT26Hr7imjf5mXtUddSyJ6B0ZQSmYM O55jbnyhBw94KUDtb68XOYgf5ON1jJd2qn+fGQcv02uvkSfT/1kOjn3DAuQAbYdCB8 p1xMKv2Xt+fkA== Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1t5N4I-007Wi1-Eb; Mon, 28 Oct 2024 10:33:50 +0000 Date: Mon, 28 Oct 2024 10:33:49 +0000 Message-ID: <87plnktt2q.wl-maz@kernel.org> From: Marc Zyngier To: "Aneesh Kumar K.V (Arm)" Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Suzuki K Poulose , Steven Price , Will Deacon , Catalin Marinas , Mark Rutland , Oliver Upton , Joey Gouly , Zenghui Yu Subject: Re: [PATCH 3/4] arm64: mte: update code comments In-Reply-To: <20241028094014.2596619-4-aneesh.kumar@kernel.org> References: <20241028094014.2596619-1-aneesh.kumar@kernel.org> <20241028094014.2596619-4-aneesh.kumar@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Suzuki.Poulose@arm.com, steven.price@arm.com, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, oliver.upton@linux.dev, joey.gouly@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 28 Oct 2024 09:40:13 +0000, "Aneesh Kumar K.V (Arm)" wrote: > > commit d77e59a8fccd ("arm64: mte: Lock a page for MTE tag > initialisation") updated the locking such the kernel now allows > VM_SHARED mapping with MTE. Update the code comment to reflect this. > > Signed-off-by: Aneesh Kumar K.V (Arm) > --- > arch/arm64/kvm/mmu.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) This is a KVM patch. Please make sure you write the subject accordingly, matching the existing conventions (in this case, this should read something like: "KVM: arm64: MTE: Update..."). > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > index a509b63bd4dd..b5824e93cee0 100644 > --- a/arch/arm64/kvm/mmu.c > +++ b/arch/arm64/kvm/mmu.c > @@ -1390,11 +1390,8 @@ static int get_vma_page_shift(struct vm_area_struct *vma, unsigned long hva) > * able to see the page's tags and therefore they must be initialised first. If > * PG_mte_tagged is set, tags have already been initialised. > * > - * The race in the test/set of the PG_mte_tagged flag is handled by: > - * - preventing VM_SHARED mappings in a memslot with MTE preventing two VMs > - * racing to santise the same page > - * - mmap_lock protects between a VM faulting a page in and the VMM performing > - * an mprotect() to add VM_MTE > + * The race in the test/set of the PG_mte_tagged flag is handled by > + * using PG_mte_lock and PG_mte_tagged together. How? This comment is pretty content-free. TO be useful, you should elaborate on *how* these two are used together. > */ > static void sanitise_mte_tags(struct kvm *kvm, kvm_pfn_t pfn, > unsigned long size) > @@ -1646,7 +1643,10 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, > } > > if (!fault_is_perm && !device && kvm_has_mte(kvm)) { > - /* Check the VMM hasn't introduced a new disallowed VMA */ > + /* > + * not a permission fault implies a translation fault which > + * means mapping the page for the first time How about an Access fault due to page ageing? Thanks, M. -- Without deviation from the norm, progress is not possible.