From: Thomas Gleixner <tglx@linutronix.de>
To: Huacai Chen <chenhuacai@loongson.cn>,
Marc Zyngier <maz@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-kernel@vger.kernel.org, loongson-kernel@lists.loongnix.cn,
Xuefeng Li <lixuefeng@loongson.cn>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH 1/2] genirq/msi, platform-msi: Adjust return value of msi_domain_prepare_irqs()
Date: Sat, 27 May 2023 16:03:29 +0200 [thread overview]
Message-ID: <87pm6llvm6.ffs@tglx> (raw)
In-Reply-To: <20230527054633.704916-2-chenhuacai@loongson.cn>
On Sat, May 27 2023 at 13:46, Huacai Chen wrote:
> Adjust the return value semanteme of msi_domain_prepare_irqs(), which
> allows us to modify the input nvec by overriding the msi_domain_ops::
> msi_prepare(). This is necessary for the later patch.
>
> Before:
> 0 on success, others on error.
>
> After:
> = 0: Success;
>> 0: The modified nvec;
> < 0: Error code.
This explains what the patch does, but provides zero justification for
this nor any analysis why this is correct for the existing use cases.
That longsoon MSI domain is a PCI MSI domain. PCI/MSI has already a
mechanism to return the actual possible number of vectors if the
underlying space is exhausted.
Why is that not sufficient for your problem at hand?
Thanks,
tglx
next prev parent reply other threads:[~2023-05-27 14:03 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-27 5:46 [PATCH 0/2] Add machanism to limit msi allocation for Loongson Huacai Chen
2023-05-27 5:46 ` [PATCH 1/2] genirq/msi, platform-msi: Adjust return value of msi_domain_prepare_irqs() Huacai Chen
2023-05-27 14:03 ` Thomas Gleixner [this message]
2023-05-28 3:42 ` Huacai Chen
2023-05-29 7:44 ` Thomas Gleixner
2023-05-29 9:35 ` Huacai Chen
2023-05-28 7:47 ` Marc Zyngier
2023-05-28 12:07 ` Huacai Chen
2023-05-29 9:27 ` Thomas Gleixner
2023-05-29 9:36 ` Huacai Chen
2023-05-29 20:19 ` Thomas Gleixner
2023-05-30 8:34 ` Huacai Chen
2023-05-30 12:22 ` Thomas Gleixner
2023-05-30 15:03 ` Thomas Gleixner
2023-06-01 15:18 ` Huacai Chen
2023-06-02 1:10 ` bibo, mao
2023-05-27 5:46 ` [PATCH 2/2] irqchip/loongson-pch-msi: Add machanism to limit msi allocation Huacai Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87pm6llvm6.ffs@tglx \
--to=tglx@linutronix.de \
--cc=bhelgaas@google.com \
--cc=chenhuacai@gmail.com \
--cc=chenhuacai@loongson.cn \
--cc=jiaxun.yang@flygoat.com \
--cc=linux-kernel@vger.kernel.org \
--cc=lixuefeng@loongson.cn \
--cc=loongson-kernel@lists.loongnix.cn \
--cc=maz@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox