From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752228AbcC2MnZ (ORCPT ); Tue, 29 Mar 2016 08:43:25 -0400 Received: from mga04.intel.com ([192.55.52.120]:43991 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751985AbcC2MnY convert rfc822-to-8bit (ORCPT ); Tue, 29 Mar 2016 08:43:24 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,410,1455004800"; d="scan'208";a="947196494" From: Jani Nikula To: Deepak M , plagnioj@jcrosoft.com, tomi.valkeinen@ti.com, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: Deepak M , David Airlie , Andrzej Hajda , Thierry Reding , Daniel Vetter Subject: Re: [Intel-gfx] [PATCH 1/5] drm: Add new DCS commands in the enum list In-Reply-To: <1459157327-2443-1-git-send-email-m.deepak@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <1459157327-2443-1-git-send-email-m.deepak@intel.com> User-Agent: Notmuch/0.21+91~gada1e33 (http://notmuchmail.org) Emacs/24.4.1 (x86_64-pc-linux-gnu) Date: Tue, 29 Mar 2016 15:43:18 +0300 Message-ID: <87poud315l.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 28 Mar 2016, Deepak M wrote: > Adding new DCS commands which are specified in the > DCS 1.3 spec related to CABC. > > v2: Sorted the Macro`s by value (Andrzej) Yeah, well, the *new* ones are now sorted, but I'm pretty sure Andrzej did mean to keep the whole enum sorted. While at it, the comment could be /* MIPI DCS 1.3 */ to be specific and useful. > > Cc: Andrzej Hajda > Cc: Thierry Reding > Cc: David Airlie > Cc: Ville Syrjälä > Cc: Daniel Vetter > Suggested-by: Jani Nikula > Signed-off-by: Deepak M > --- > include/video/mipi_display.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h > index ddcc8ca..6831c84 100644 > --- a/include/video/mipi_display.h > +++ b/include/video/mipi_display.h > @@ -117,6 +117,14 @@ enum { > MIPI_DCS_GET_SCANLINE = 0x45, > MIPI_DCS_READ_DDB_START = 0xA1, > MIPI_DCS_READ_DDB_CONTINUE = 0xA8, > + MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /*Spec 1.3*/ > + MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /*Spec 1.3*/ > + MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /*Spec 1.3*/ > + MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /*Spec 1.3*/ > + MIPI_DCS_WRITE_POWER_SAVE = 0x55, /*Spec 1.3*/ > + MIPI_DCS_GET_POWER_SAVE = 0x56, /*Spec 1.3*/ > + MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /*Spec 1.3*/ > + MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, /*Spec 1.3*/ > }; > > /* MIPI DCS pixel formats */ -- Jani Nikula, Intel Open Source Technology Center