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Fri, 10 Jul 2026 08:28:13 +0000 Date: Fri, 10 Jul 2026 09:30:02 +0100 Message-ID: <87qzlb5jsl.wl-maz@kernel.org> From: Marc Zyngier To: Marek Vasut Cc: linux-pci@vger.kernel.org, kernel test robot , Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Bjorn Helgaas , Catalin Marinas , Conor Dooley , Geert Uytterhoeven , Krzysztof Kozlowski , Lorenzo Pieralisi , Manivannan Sadhasivam , Rob Herring , Yoshihiro Shimoda , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH] PCI: rcar-gen4: Inline GIC_TRANSLATER offset macro In-Reply-To: <20260709201103.90162-1-marek.vasut+renesas@mailbox.org> References: <20260709201103.90162-1-marek.vasut+renesas@mailbox.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: marek.vasut+renesas@mailbox.org, linux-pci@vger.kernel.org, lkp@intel.com, kwilczynski@kernel.org, bhelgaas@google.com, catalin.marinas@arm.com, conor+dt@kernel.org, geert+renesas@glider.be, krzk+dt@kernel.org, lpieralisi@kernel.org, mani@kernel.org, robh@kernel.org, yoshihiro.shimoda.uh@renesas.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 09 Jul 2026 21:10:03 +0100, Marek Vasut wrote: >=20 > Instead of pulling in the whole linux/irqchip/arm-gic-v3.h , copy the > one GITS_TRANSLATER register offset macro directly into the driver. > This repairs the ability to build the driver on non-ARM non-GIC targets > the way it was possible until now, which retains good build test coverage. >=20 > Reported-by: kernel test robot > Closes: https://lore.kernel.org/oe-kbuild-all/202607100310.iQw5m9Uo-lkp@i= ntel.com/ > Signed-off-by: Marek Vasut > --- > Cc: "Krzysztof Wilczy=C5=84ski" > Cc: Bjorn Helgaas > Cc: Catalin Marinas > Cc: Conor Dooley > Cc: Geert Uytterhoeven > Cc: Krzysztof Kozlowski > Cc: Lorenzo Pieralisi > Cc: Manivannan Sadhasivam > Cc: Marc Zyngier > Cc: Rob Herring > Cc: Yoshihiro Shimoda > Cc: devicetree@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-doc@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-pci@vger.kernel.org > Cc: linux-renesas-soc@vger.kernel.org > --- > Note: The alternative I could think of would be ifdeffery which > is not nice and thwarts the build coverage, or limit the > driver to ARM/ARM64 in Kconfig which also thwarts the build > coverage. I could also split off the register macros in > linux/irqchip/arm-gic-v3.h into some separate header > linux/irqchip/arm-gic-v3-regs.h and include that which > might be OKish and avoids duplication. Thoughts ? No, I'm not hacking something that is purely architecture specific for the purpose of a bizarre integration quirk that should be handled by the boot firmware, and not Linux. Add whatever you want to the PCI glue code, limit this to arm64 (which is the only architecture this can ever be used on, and the build coverage argument really doesn't hold), but please leave the GIC code alone. M. --=20 Jazz isn't dead. It just smells funny.