From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78101395D93 for ; Tue, 7 Apr 2026 10:45:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775558756; cv=none; b=ocrDE/TwpsaYFuxjtmS7RVl7UnXe04V7LVygNFiKZeCqsZzeOApg0ZpdCjPZgTEdEFDFABiTgVVCSH0KZQh7C9e3m1HbBiwtuSLsDtKJLPQKgFH9M/JohBOl0BYqT2edLL/6q0yvq9Rh2hRAVs3YcSUjQoF0+9DTREyvL55RNiU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775558756; c=relaxed/simple; bh=ggSPgchB3iNilKuVU21D9VpWFHosMz7lN/byIqZRjKU=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=HpvKdwCkewzMHR8ASDxfMbLuHI8cKR39XKHO+QNSXgOXdwzP3zRwbtHkQz5hzox1ETaiRECg3SO14mQG8G5kkP+3JazBQORzUN5nNkcoeUSEQ3P4VLqSt4v1POHKBTD2Q1SApeLDZ6xnLSLSjd3RJu+tvfhzlhuz719jRVOG/NA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=MMibLOPF; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=wKEOZh9S; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="MMibLOPF"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="wKEOZh9S" From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1775558752; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WQgym9ZAVoFqcFRIKaH80Iz/O7KjeNCJTKRL2Rs041Q=; b=MMibLOPFz8j7Z8jsPKrJfshd0mpVnxxSiRFX0N3ATjQQ4cR7G4JqjZR5jz3LQ5bJRYWgqH 57aKW1ac+s0A4tjwhAaclrpjaVGZlBc0dtiC8viHqdJmrY11AjwUxuhdO3mru/eOw3aQCa O33LggCfEKmK2MSiPF3kZYwNc0pOhVi218kpMjhDF6wG2YvMr5XkwzGCYycDCruG/F8kk2 cW0PGpcrFbM2ouHBZOgKVKtttDz6PGOVPDR4GzXyFGnDVZD8utHYd43QcSKfrZrQGwJCwF pPTqiV0gmrUJKKdR8HLYFjaWy8M4846vyaWnrlmNPT9N6G+o7hoENMsND8cYpA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1775558752; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WQgym9ZAVoFqcFRIKaH80Iz/O7KjeNCJTKRL2Rs041Q=; b=wKEOZh9S43N3RRZrhapslLj/r+BMzXzupDhktwsk5lZPHV1CwsIhX/Yo338zzjqeezL5zA VWKpTD4hGrpaHsDA== To: Marc Zyngier , Manivannan Sadhasivam Cc: Qiang Yu , linux-kernel@vger.kernel.org Subject: Re: MSIs not freed in GICv3 ITS driver In-Reply-To: <86zf3m3bps.wl-maz@kernel.org> References: <877cdupdvu.wl-maz@kernel.org> <20240721085032.GL1908@thinkpad> <4pdu25dnnqegnd67zf4ftfvwc57bn67kp7mj2gk2cywc3hdcvr@eydar5gvuwtu> <86wm08ad2y.wl-maz@kernel.org> <865x7jaajs.wl-maz@kernel.org> <86cy0l4tq1.wl-maz@kernel.org> <864ilv3xlp.wl-maz@kernel.org> <4lidir7hbrtwioxujeqyulk2e5wcjsy4qmlqjprncbogrepylz@wdwveqxidrxj> <86zf3m3bps.wl-maz@kernel.org> Date: Tue, 07 Apr 2026 12:45:51 +0200 Message-ID: <87qzor59r4.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, Apr 01 2026 at 17:08, Marc Zyngier wrote: > On Wed, 01 Apr 2026 13:01:49 +0100, > Manivannan Sadhasivam wrote: > 1 *IS* a power of two. Any driver that does that is perfectly fine. > > A driver that does > > pci_alloc_irq_vectors(pdev, 1, 7, PCI_IRQ_MSI); > > or > > pci_alloc_irq_vectors(pdev, 7, 7, PCI_IRQ_MSI); > > is broken. *That* is what the PCI core code should enforce. No. The PCI MSI specification mandates that the number of MSI vectors supported by a device has to be a power of two. That's what the kernel reads from the 'Multiple Message Capable' field in the MSI control word. It also mandates the the number of enabled vectors in the 'Multiple Message Enable' field of the MSI control word is a power of two and has to be less and equal than the Capable field. But the specification does not mandate at all how many vectors a driver uses for operation. It neither mandates that a device can actually utilize all possible vectors it advertises. So having a MSI capable device which supports 5 vectors is perfectly valid. In order to do that, the device must have the Capable field populated to '8' and PCI core has to write 8 to the Enable field in order to allocate 5 vectors. That's the only requirement. For MSI-X there is no explicit power of two requirement in the specification at all. The message table size is encoded in the Table Size field without any power of two requirement. The description of the Pending Bit Array makes this entirely clear: "The Pending Bit Array (PBA) structure, illustrated in Figure 6-4, contains the function=E2=80=99s Pending Bits, one per Table entry, organi= zed as a packed array of bits within QWORDs. The last QWORD will not necessarily be fully populated." So it is clearly not something which can be enforced by the PCI core or imposed on drivers. It's a problem of the underlying infrastructure. If underlying infrastructure has power of two requirements to e.g. allocate a redirection table, then it has to ensure that on its own and not impose restrictions on everybody else for it's own conveniance. Thanks, tglx