[PATCH v11 0/4] Loongarch irq-redirect support

Tianyang Zhang
2026-02-03T12:45:47Z

This series of patches introduces support for interrupt-redirect
controllers, and this hardware feature will be supported on 3C6000
for the first time

change log:
v0->v1:
1.Rename the model names in the document.
2.Adjust the code format.
3.Remove architecture - specific prefixes.
4.Refactor the initialization logic, and IR driver no longer set
AVEC_ENABLE.
5.Enhance compatibility under certain configurations.

v1->v2:
1.Fixed an erroneous enabling issue.

v2->v3
1.Replace smp_call with address mapping to access registers
2.Fix some code style issues

v3->v4
1.Provide reasonable comments on the modifications made to
IRQ_SET_MASK_OK_DONE
2.Replace meaningless empty functions with parent_mask/unmask/ack
3.Added and indeed released resources
4.Added judgment for data structure initialization completion to
avoid duplicate creation during cpuhotplug
5.Fixed the code style and some unnecessary troubles

v4->v5
1.when it is detected in avecintc_set_affinity that the current affinity
remains valid, the return value is modified to IRQ_SET_MASK_OK_DONE.
After the introduction of redirect-domain, for each interrupt source,
avecintc-domain only provides the CPU/interrupt vector, while redirect-domain
provides other operations to synchronize interrupt affinity information
among multiple cores. The original intention is to notify the cascaded
redirect_set_affinity that multi-core synchronization is not required.
However, this introduces some compatibility issues, such as the new return
value causing msi_domain_set_affinity to no longer perform irq_chip_write_msi_msg.
1) When redirect exist in the system, the msi msg_address and msg_data no
longer changes after the allocation phase, so it does not actually require updating
the MSI message info.
2) When only avecintc exists in the system, the irq_domain_activate_irq
interface will be responsible for the initial configuration of the MSI message,
which is unconditional. After that, if unnecessary, no modification to the MSI
message is alse correctly.

2.Restructured the macro definitions to make them appear more logical.

3.Adjusted the layout of members struct redirect_queue\struct redirect_table and
struct redirect_item, making redirect_item the primary interface for accessing
other members.

4.The method of accessing registers has been standardized to MMIO.

5.Initialize variables at declaration whenever possible.

6.Replaced the the "struct page" in redirect_table and redirect_queue with "struct folio".

7.Adjusted the initialization process so that all irq_desc configurations are completed
during driver initialization, no longer relying on specific CPUs being online.

8.Refactored portions of the code to make them more concise and logical.

v5->v6
Fix the warning messages reported by the test bot.

v6->v7:
1 Split patch:
1) Docs/LoongArch: Add Advanced Extended-Redirect IRQ model description
2) LoongArch: Architectural preparation for Redirect irqchip
3) irqchip/irq-loongson.h:irq-loongson.h preparation for Redirect irqchip
4) irqchip/loongarch-avec.c:return IRQ_SET_MASK_OK_DONE when keep affinity
5) irqchip/irq-loongarch-ir:Add Redirect irqchip support

2 Use sizeof() to replace fixed-size macro definitions.

3 Unify the data types of the parameters for redirect_write/read_reg*.

4 rename irde_invalid_entry_node to irde_invalid_entry and add comments
explaining the 'raddr'.

5 Fix the critical condition check bug in redirect_table_alloc.

6 Use clear_bit to replace bitmap_release_region

7 Delete some goto and handle the failure when it occurs.

8 Removed the check for the `CONFIG_ACPI` macro, as CONFIG_ACPI
is selected by the arch/loongarch/Kconfig.

9 Fixed the incorrect error flow in redirect_acpi_init.

v7->v8:
1 Apologies for the chaotic email delivery due to some network issues earlier.

2 redirect_table_alloc now allocates nr_irqs consecutive redirect table entries to
support multiple MSI devices.

v8->v9:
1 Rebased and reorganized the patches on the latest irq/core branch.

v9->v10
1 Rewrite the changelog in the order of background, problem and solution.
2 Fix the potential undefined issue with 'order' in the redirect_table_alloc.
3 Use GPL-2.0-only as SPDX-License-Identifier.
4 Update the code creation time.
5 Rearrange the order of the header files alphabetically.
6 Refactor portions of the code and remove unnecessary line breaks.
7 Rename __redirect_irde_fini() to redirect_free_irde() and label it with __init.

v10->v11
1 Adjust the name of patch 0002.
2 Simplify some code.
3 Fix the incorrect data type.

Tianyang Zhang (4):
Docs/LoongArch: Add Advanced Extended-Redirect IRQ model description
irqchip/irq-loonarch-avec: Prepare for interrupt redirection support
irqchip/loongarch-avec.c: return IRQ_SET_MASK_OK_DONE when keep
affinity
irqchip/irq-loongarch-ir:Add Redirect irqchip support

.../arch/loongarch/irq-chip-model.rst | 38 ++
.../zh_CN/arch/loongarch/irq-chip-model.rst | 37 ++
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-loongarch-avec.c | 20 +-
drivers/irqchip/irq-loongarch-ir.c | 522 ++++++++++++++++++
drivers/irqchip/irq-loongson.h | 19 +
6 files changed, 624 insertions(+), 14 deletions(-)
create mode 100644 drivers/irqchip/irq-loongarch-ir.c

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2.41.0