From: Thomas Gleixner <tglx@linutronix.de>
To: "Brown, Len" <len.brown@intel.com>,
"Zhang, Rui" <rui.zhang@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: "Gross, Jurgen" <jgross@suse.com>,
"mikelley@microsoft.com" <mikelley@microsoft.com>,
"arjan@linux.intel.com" <arjan@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"ray.huang@amd.com" <ray.huang@amd.com>,
"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
"Sivanich, Dimitri" <dimitri.sivanich@hpe.com>,
"wei.liu@kernel.org" <wei.liu@kernel.org>
Subject: RE: [patch V3 27/40] x86/cpu: Provide a sane leaf 0xb/0x1f parser
Date: Wed, 30 Aug 2023 14:39:02 +0200 [thread overview]
Message-ID: <87r0nk66xl.ffs@tglx> (raw)
In-Reply-To: <MN0PR11MB6010F1D501B9A2C0B7B3D1F6E0E6A@MN0PR11MB6010.namprd11.prod.outlook.com>
On Wed, Aug 30 2023 at 02:46, Len Brown wrote:
>> and it's more than obvious that
>> non-enumerated domain levels occupy _zero_ bits in the APIC ID
>> partitioning and therefore end up being size _one_.
>
> By "size _one_", do you mean that a non-enumerated level gets a valid
> id, eg. id=0?
>
> That direction would be problematic.
>
> If CPUID.1F doesn't enumerate a module level, then there is NO module level.
> Conjuring up a valid module_id=0 in this scenario is a bug.
>
> For a module level to exist, it must occupy at least 1 bit in the APIC ID.
>
> This is what I failed to impress upon you about die_id erroneously
> following the example of package_id. Package_id is special. There is
> always an architectural package, and if no package bits are set in the
> APIC-id, we can still assume package_id=0.
>
> This is not true for the intermediate levels. If they are not
> enumerated, they DO NOT EXIST.
Again. You are conflating an implementation detail with a conceptual
problem.
Conceptually _all_ levels exist, but the ones which occupy zero bits
have no meaning. Neither have the unknown levels if they should surface
at some point.
So as they _all_ exist the logical consequence is that even those which
occupy zero bits have an ID.
Code which is interested in information which depends on the enumeration
of the level must obviously do:
if (level_exists(X))
analyse_level(X)
Whether you express that via an invalid level ID or via an explicit
check for the level is an implementation detail.
Other code paths can still utilize the resulting ID for comparisons
without checking whether the level exists or not. The validity of such a
comparision is not per se wrong. It depends on what you want to achieve
and in some cases the unconditional comparison just allows you to write
better code because there are enough cases where the only information
required is whether two IDs are matching or not. Such code neither cares
whether there are multiple instances of that level nor does it deduce
that there is level dependent information.
The problem of the current implementation is not that the die ID is
automatically assigned. The problem is at the usage sites which blindly
assume that there must be a meaning. That's a completely different issue
and has absolutely nothing to do with purely mathematical deduced ID
information at any given level.
See?
Thanks,
tglx
next prev parent reply other threads:[~2023-08-30 18:38 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-02 10:20 [patch V3 00/40] x86/cpu: Rework the topology evaluation Thomas Gleixner
2023-08-02 10:20 ` [patch V3 01/40] cpu/SMT: Make SMT control more robust against enumeration failures Thomas Gleixner
2023-08-04 17:50 ` Borislav Petkov
2023-08-04 20:01 ` Thomas Gleixner
2023-08-02 10:21 ` [patch V3 02/40] x86/apic: Fake primary thread mask for XEN/PV Thomas Gleixner
2023-08-04 18:12 ` Borislav Petkov
2023-08-04 20:02 ` Thomas Gleixner
2023-08-02 10:21 ` [patch V3 03/40] x86/cpu: Encapsulate topology information in cpuinfo_x86 Thomas Gleixner
2023-08-02 10:21 ` [patch V3 04/40] x86/cpu: Move phys_proc_id into topology info Thomas Gleixner
2023-08-02 10:21 ` [patch V3 05/40] x86/cpu: Move cpu_die_id " Thomas Gleixner
2023-08-09 14:32 ` Zhang, Rui
2023-08-09 15:14 ` Thomas Gleixner
2023-08-02 10:21 ` [patch V3 06/40] scsi: lpfc: Use topology_core_id() Thomas Gleixner
2023-08-02 10:21 ` [patch V3 07/40] hwmon: (fam15h_power) " Thomas Gleixner
2023-08-02 10:21 ` [patch V3 08/40] x86/cpu: Move cpu_core_id into topology info Thomas Gleixner
2023-08-02 10:21 ` [patch V3 09/40] x86/cpu: Move cu_id " Thomas Gleixner
2023-08-02 10:21 ` [patch V3 10/40] x86/cpu: Remove pointless evaluation of x86_coreid_bits Thomas Gleixner
2023-08-02 10:21 ` [patch V3 11/40] x86/cpu: Move logical package and die IDs into topology info Thomas Gleixner
2023-08-02 10:21 ` [patch V3 12/40] x86/cpu: Move cpu_l[l2]c_id " Thomas Gleixner
2023-08-02 10:21 ` [patch V3 13/40] x86/apic: Use BAD_APICID consistently Thomas Gleixner
2023-08-02 10:21 ` [patch V3 14/40] x86/apic: Use u32 for APIC IDs in global data Thomas Gleixner
2023-08-02 10:21 ` [patch V3 15/40] x86/apic: Use u32 for check_apicid_used() Thomas Gleixner
2023-08-02 10:21 ` [patch V3 16/40] x86/apic: Use u32 for cpu_present_to_apicid() Thomas Gleixner
2023-08-02 10:21 ` [patch V3 17/40] x86/apic: Use u32 for phys_pkg_id() Thomas Gleixner
2023-08-02 10:21 ` [patch V3 18/40] x86/apic: Use u32 for [gs]et_apic_id() Thomas Gleixner
2023-08-02 10:21 ` [patch V3 19/40] x86/apic: Use u32 for wakeup_secondary_cpu[_64]() Thomas Gleixner
2023-08-10 7:58 ` Qiuxu Zhuo
2023-08-02 10:21 ` [patch V3 20/40] x86/cpu/topology: Cure the abuse of cpuinfo for persisting logical ids Thomas Gleixner
2023-08-02 10:21 ` [patch V3 21/40] x86/cpu: Provide debug interface Thomas Gleixner
2023-08-02 10:21 ` [patch V3 22/40] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2023-08-02 10:21 ` [patch V3 23/40] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2023-08-04 8:14 ` K Prateek Nayak
2023-08-04 8:28 ` Thomas Gleixner
2023-08-04 8:34 ` K Prateek Nayak
2023-08-12 6:41 ` Zhang, Rui
2023-08-12 8:00 ` Zhang, Rui
2023-08-14 6:26 ` Thomas Gleixner
2023-08-14 7:11 ` Zhang, Rui
2023-08-13 13:30 ` Zhang, Rui
2023-08-13 14:36 ` Thomas Gleixner
2023-08-14 6:20 ` Thomas Gleixner
2023-08-14 6:42 ` Zhang, Rui
2023-08-02 10:21 ` [patch V3 24/40] x86/cpu: Add legacy topology parser Thomas Gleixner
2023-08-02 10:21 ` [patch V3 25/40] x86/cpu: Use common topology code for Centaur and Zhaoxin Thomas Gleixner
2023-08-02 10:21 ` [patch V3 26/40] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2023-08-02 10:21 ` [patch V3 27/40] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2023-08-12 8:21 ` Zhang, Rui
2023-08-12 20:04 ` Thomas Gleixner
2023-08-13 15:04 ` Thomas Gleixner
2023-08-14 8:25 ` Zhang, Rui
2023-08-14 12:26 ` Thomas Gleixner
2023-08-14 14:48 ` Brown, Len
2023-08-14 16:13 ` Thomas Gleixner
2023-08-15 19:30 ` Brown, Len
2023-08-17 9:09 ` Thomas Gleixner
2023-08-18 5:01 ` Brown, Len
2023-08-21 10:27 ` Thomas Gleixner
2023-08-30 2:46 ` Brown, Len
2023-08-30 12:39 ` Thomas Gleixner [this message]
2023-09-01 3:09 ` Brown, Len
2023-09-01 7:45 ` Thomas Gleixner
2023-08-14 15:28 ` Zhang, Rui
2023-08-14 17:12 ` Thomas Gleixner
2023-08-02 10:21 ` [patch V3 28/40] x86/cpu: Use common topology code for Intel Thomas Gleixner
2023-08-02 10:21 ` [patch V3 29/40] x86/cpu/amd: Provide a separate accessor for Node ID Thomas Gleixner
2023-08-02 10:21 ` [patch V3 30/40] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2023-08-02 19:28 ` Michael Kelley (LINUX)
2023-08-02 19:46 ` Thomas Gleixner
2023-08-02 19:51 ` [patch V3a " Thomas Gleixner
2023-08-11 12:58 ` Pu Wen
2023-08-11 17:11 ` Thomas Gleixner
2023-08-12 3:58 ` Pu Wen
2023-10-13 9:38 ` [tip: x86/core] x86/cpu/hygon: Fix the CPU topology evaluation for real tip-bot2 for Pu Wen
2023-08-02 10:21 ` [patch V3 31/40] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2023-08-02 10:21 ` [patch V3 32/40] x86/cpu: Use common topology code for AMD Thomas Gleixner
2023-08-02 10:21 ` [patch V3 33/40] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2023-08-11 13:00 ` Pu Wen
2023-08-11 17:11 ` Thomas Gleixner
2023-08-02 10:21 ` [patch V3 34/40] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2023-08-02 10:21 ` [patch V3 35/40] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2023-08-02 10:21 ` [patch V3 36/40] x86/cpu: Remove topology.c Thomas Gleixner
2023-08-02 10:21 ` [patch V3 37/40] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2023-08-02 10:21 ` [patch V3 38/40] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2023-08-02 10:21 ` [patch V3 39/40] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2023-08-02 10:22 ` [patch V3 40/40] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2023-08-02 11:56 ` [patch V3 00/40] x86/cpu: Rework the topology evaluation Juergen Gross
2023-08-03 0:07 ` Sohil Mehta
2023-08-03 3:44 ` Michael Kelley (LINUX)
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