From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8BA9C6FA8F for ; Thu, 24 Aug 2023 09:01:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238867AbjHXJB3 (ORCPT ); Thu, 24 Aug 2023 05:01:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240669AbjHXJBZ (ORCPT ); Thu, 24 Aug 2023 05:01:25 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B224B1987 for ; Thu, 24 Aug 2023 02:01:20 -0700 (PDT) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1692867679; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=s7VSepTzq6Nzp7ENl0zwOdnjoyoTXch0C00nzIIkbHI=; b=qfdzrsTLTVhxn7JpgVmDAxskzg+zAO60QpTxO1ow95h8dmW68Eeb7Sfq45msJxzni4Vt4S 7qgxy75wWCMEpYId1vO8oTFj/uhIdv0zEoIqd+DAVyTsNfKFZb+9IHOSlc/JaR3Il/8iYw +OtiaIUUfOgApiZQwPiqnRenrPBMwQLnBuhDKjw0+UeD4h5Pt4PVnT38m9iKlXegaC56bv i/oe3emPlj2gRB/u5tB6DjCyG3QyqLteaOkH5sjv9A6XwlBANL/+CylHF0cBho5cVKyZCc Xum/j91oi83ol2iVcxZRVCAg5QkhNcSgipwafAdRNFcEs4o0L6QqqLkbcZw47g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1692867679; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=s7VSepTzq6Nzp7ENl0zwOdnjoyoTXch0C00nzIIkbHI=; b=pN31rc3K6i8ibEbaMfGQuKUzmd/XuuckU1SkXDvXHd+KazpT0UElPvv/8tAU/PimPxxMSv T2QnLQoQeWvNioAQ== To: Feng Tang , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Peter Zijlstra , x86@kernel.org, kernel test robot , linux-kernel@vger.kernel.org Cc: Feng Tang Subject: Re: [PATCH] x86/fpu: set X86_FEATURE_OSXSAVE feature after enabling OSXSAVE in CR4 In-Reply-To: <20230823065747.92257-1-feng.tang@intel.com> References: <20230823065747.92257-1-feng.tang@intel.com> Date: Thu, 24 Aug 2023 11:01:18 +0200 Message-ID: <87r0nsddb5.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 23 2023 at 14:57, Feng Tang wrote: > diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c > index 0bab497c9436..8ebea0d522d2 100644 > --- a/arch/x86/kernel/fpu/xstate.c > +++ b/arch/x86/kernel/fpu/xstate.c > @@ -173,6 +173,9 @@ void fpu__init_cpu_xstate(void) > > cr4_set_bits(X86_CR4_OSXSAVE); > > + if (!boot_cpu_has(X86_FEATURE_OSXSAVE)) > + setup_force_cpu_cap(X86_FEATURE_OSXSAVE); This is wrong in several aspects: 1) You force the feature bit _before_ XSAVE is completely initialized. fpu__init_system_xstate() has error paths which disable XSAVE. 2) This conditional should have been a red flag for you simply because fpu__init_cpu_xstate() is invoked on all CPUs not only on the BSP. I fixed it up and added a proper comment explaining it.