From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0BD5236F907; Thu, 11 Jun 2026 07:56:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781164573; cv=none; b=myk1kmK6pjfow/T65gn4eBd+2zgmvTCMLLqTdLV/4QHKBdSE/2Bd5axWIl9Ly+75thzKU30djgMZyQRvdwRQ4mYOkocynWOz85l1h/n9xPbhY4DuHm1uQwU1/RWZ9ofC/WeM2YJ9CnMZ74iPfZvlub8K2jhShWdlnMMKK1wOJgo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781164573; c=relaxed/simple; bh=rRlrDtuTm/sN4CS77Jx9OaYafy+U3NDwYeuqhaXJ6/Y=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Pra9rpzqROiwbrgP9A1cjMG1/XKJXXtt//ofEn4jtNmB4DvE5RsZ/tBiVePmansdoVyM8cvX4nACixnhPnrW2KRPtD+t+YC6bHFu0LyHQgoElYtz53xdakxfAsqEvniZzmvPElYicPgDg3Lrgty101BzeSVJoc+MKnlbrQrMYhA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZivF/jAa; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZivF/jAa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AADFD1F00893; Thu, 11 Jun 2026 07:56:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781164571; bh=0JJRQDfwFlySaJlWRSDpfSAl2Vf46aH/2FA/Y0ddwyc=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=ZivF/jAa3LXIyu+8lwjnjq7Tx9EpszTJdfGEGCfHvmeKdWuvJbfcXV4jhiADOWW8F R6DSsSeyA/SlETFyjKHZL1qTWieUUnb5Ehlpj3xXUPSVyj9vQ6TDztHWy2SYoZias0 gVHMqLeXDrAopCoDMO8mBjrRQxOiyJVfEI3jYtU3a9Ef+qppdIUt1KLZh/oTTLyQI+ a66xMaI7BbjhemNbNcG9QTiPqHRWJh+DEm0m0/igf0ds4xnN2IHnmvc44SKBDSbDCa YqK7w6WqChGSa5VAFfJCgHJTZstVfsP1YbM22xhipZpFIYR0q0yMJbZYgzLihsh5G6 uhw0OGn20DrIw== Received: from sofa.misterjones.org ([185.219.108.64] helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wXaGm-0000000Bemv-3P9i; Thu, 11 Jun 2026 07:56:09 +0000 Date: Thu, 11 Jun 2026 08:59:19 +0100 Message-ID: <87se6t8q3s.wl-maz@kernel.org> From: Marc Zyngier To: Stephan Gerhold Cc: Mark Rutland , Daniel Lezcano , Thomas Gleixner , Sudeep Holla , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Jack Matthews Subject: Re: [PATCH 0/2] clocksource/drivers/arm_arch_timer_mmio: Restore support for early init In-Reply-To: <20260610-arm-arch-timer-mmio-early-v1-0-ac17218ec8b4@linaro.org> References: <20260610-arm-arch-timer-mmio-early-v1-0-ac17218ec8b4@linaro.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: stephan.gerhold@linaro.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, sudeep.holla@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jack@jackmatthe.ws X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 10 Jun 2026 18:53:09 +0100, Stephan Gerhold wrote: > > Jack reported a regression for some single-core Qualcomm platforms (e.g. > MDM9625, MDM9607) that no longer boot because no timers can be found during > early boot [1]. Again, this is *not* a regression. These machines were *never* supported upstream. > These platforms rely on an obscure timer setup where the > global Arm MMIO timer (arm,armv7-timer-mem) is used as the only available > timer for the CPU. This setup used to work fine until commit 0f67b56d84b4 > ("clocksource/drivers/arm_arch_timer_mmio: Switch over to standalone > driver") when the early timer initialization using TIMER_OF_DECLARE() was > removed when moving to the standalone MMIO driver. > > There doesn't seem to be any other usable CPU timer on those platforms, so > this series restores the early timer support using TIMER_OF_DECLARE() > inside the new standalone arm_arch_timer_mmio driver. This is pretty ugly, > but I could not think of a better solution so far. I tried to keep the > ugliness for the two probe paths as limited as possible. :-) > > If someone has a better idea how to solve this, I would be happy to try it. I would suggest finding out what is the latest point in the init sequence where the timer can be probed without preventing boot. M. -- Jazz isn't dead. It just smells funny.