From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A6193F076E for ; Tue, 24 Mar 2026 12:19:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774354786; cv=none; b=i/ZT8FajyNxJJm5X8ePMjtHhfJfBCM951ZjBmMWfCbPGY+2oi9e7BESpg/QvfytSjo2IROxbXbehAwRqPgzYIcdOAyzQokX3YwOqizBZjgDP1V2casrT0OR1wxpQeWsSqTAPqED2kbQxJcuesJGgqRLqk3IHdw/IKOdimVCItoQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774354786; c=relaxed/simple; bh=UPwEhZktdDhfBTsb4YwZNe31JCGeYvYHoQFX536I8HM=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=PB2HUCISKU35V+BOHzzYjc4fO4e/AXBbIagRxz+Bk7sTqtySROTMFRWT719BNRouVj4bpu8RtNlb0kU77O2xIFIyIWLp/JCICMAmofDRYDtSZMsY5Rr0lTPX194RA0qDo7+OUEFHlVZRvLBXXYkBY24/R/A60SInsOCYg+5XHFo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SomJb9LW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SomJb9LW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 31093C19424; Tue, 24 Mar 2026 12:19:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774354786; bh=UPwEhZktdDhfBTsb4YwZNe31JCGeYvYHoQFX536I8HM=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=SomJb9LW/zHZ2RPPe2bRDZQScvPH1LKo3AlvubCT6bJsl/jI09qjbeYzs0pVoMyA2 ixpEq26N/8zKXvJD4JhoCJK1OZvunXtQl0Ow2v46aKOfJ8NSS4l5F1KwGypKyJTr0U MYIxsiJ4e09HIZWClSmmKhCJvtGYEQDE7omGkQJh7TcDcFPLa2H0HP0uOL8o6HKxcg iT+nG8vepz8Ko6M5/3fHH6/p5QYavcA5HqtVlElhkdTJQdh6TVw5XURHeZy9c5730U 7fNGKqeE3tJ0xutTqR9SYIx4Lkeh5t3opZRnO+kNIYd+s7sMiGv0ZaGmo4E5IPvnFN KJG81m34OrAeg== From: Thomas Gleixner To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, ada.coupriediaz@arm.com, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, luto@kernel.org, peterz@infradead.org, ruanjinjie@huawei.com, vladimir.murzin@arm.com, will@kernel.org Subject: Re: [PATCH 1/2] arm64/entry: Fix involuntary preemption exception masking In-Reply-To: <87fr5six4d.ffs@tglx> References: <20260320113026.3219620-1-mark.rutland@arm.com> <20260320113026.3219620-2-mark.rutland@arm.com> <87eclek0mb.ffs@tglx> <87341ujwl4.ffs@tglx> <87fr5six4d.ffs@tglx> Date: Tue, 24 Mar 2026 13:19:42 +0100 Message-ID: <87se9ph129.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Sun, Mar 22 2026 at 00:25, Thomas Gleixner wrote: > On Fri, Mar 20 2026 at 17:31, Mark Rutland wrote: > Looking at those details made me also look at this magic > arch_irqentry_exit_need_resched() inline function. > > /* > * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC > * priority masking is used the GIC irqchip driver will clear DAIF.IF > * using gic_arch_enable_irqs() for normal IRQs. If anything is set in > * DAIF we must have handled an NMI, so skip preemption. > */ > if (system_uses_irq_prio_masking() && read_sysreg(daif)) > return false; > > Why is this using irqentry_enter/exit() in the first place? Ah. The entry point does if (regs_irqs_disabled(regs)) do_nmi(); else do_irq(); So you end up in do_irq() and eventually in the preemption path and need that check to prevent scheduling. So that should be fine and obviously won't hit the code path I outlined. Thanks, tglx