From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E5ECC433EF for ; Tue, 7 Jun 2022 07:18:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237569AbiFGHS1 (ORCPT ); Tue, 7 Jun 2022 03:18:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237291AbiFGHSZ (ORCPT ); Tue, 7 Jun 2022 03:18:25 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 741635BD37 for ; Tue, 7 Jun 2022 00:18:23 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0122761614 for ; Tue, 7 Jun 2022 07:18:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 55BF9C385A5; Tue, 7 Jun 2022 07:18:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1654586302; bh=+8UWenkFd7hSt1wke1e+YAZrrSqvcOnCfQjn/+OWy50=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=QoFrsbA8jWZrC9kSWDv0H5OeUj8DUOc5GgU2fcl08uFcsGQ1vr38hqorLE8nVxZE6 VoWuVonA4xTKliIDJTrgP3n/wsELqpjWhRk4PbFZLoZPjbMCZJCOD4ny+ioJ3dWSCV PwSjLNbCfg7ndv4jLvg4h/eFTOVr+0+7Cur+OV4sqvQ8EpCH5tSL1csJg4FbFwJGeV Dp9ZkxkLMvyhHUAyNARebF/0hMpncUl8vVGaMB1YYS67rs9G4h3ovvGHp4YdR0YGIR wsG9S0FRqlAuNM2sU0hh8Gsk9Y1qd9fcE85VM7VZ/OyPPJbhivhE5KKb32Yo6TED51 3toDeeTcdk5ug== Received: from ip-185-104-136-29.ptr.icomera.net ([185.104.136.29] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nyTTn-00G5df-H2; Tue, 07 Jun 2022 08:18:19 +0100 Date: Tue, 07 Jun 2022 08:18:10 +0100 Message-ID: <87sfohyma5.wl-maz@kernel.org> From: Marc Zyngier To: Aswath Govindraju Cc: Vignesh Raghavendra , Nishanth Menon , Tero Kristo , Santosh Shilimkar , Thomas Gleixner , , Subject: Re: [PATCH] irqchip/ti-sci-intr: Add support for system suspend/resume PM In-Reply-To: <20220607061912.12222-1-a-govindraju@ti.com> References: <20220607061912.12222-1-a-govindraju@ti.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: a-govindraju@ti.com, vigneshr@ti.com, nm@ti.com, kristo@kernel.org, ssantosh@kernel.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 07 Jun 2022 07:19:12 +0100, Aswath Govindraju wrote: > > Add support for system level suspend/resume power management. The > interrupt mappings are stored in an array and restored in the system level > resume routine. Struct ti_sci_resource_desc can have atmost 2 sets for > ranges. Therefore, the mapping array is also formatted such that it can > store two sets of ranges. > > Signed-off-by: Aswath Govindraju > --- > drivers/irqchip/irq-ti-sci-intr.c | 108 ++++++++++++++++++++++++++++++ > 1 file changed, 108 insertions(+) > > diff --git a/drivers/irqchip/irq-ti-sci-intr.c b/drivers/irqchip/irq-ti-sci-intr.c > index fe8fad22bcf9..a8fc6cfb96ca 100644 > --- a/drivers/irqchip/irq-ti-sci-intr.c > +++ b/drivers/irqchip/irq-ti-sci-intr.c > @@ -25,6 +25,7 @@ > * @dev: Struct device pointer. > * @ti_sci_id: TI-SCI device identifier > * @type: Specifies the trigger type supported by this Interrupt Router > + * @mapping: Pointer to out_irq <-> hwirq mapping table > */ > struct ti_sci_intr_irq_domain { > const struct ti_sci_handle *sci; > @@ -32,6 +33,7 @@ struct ti_sci_intr_irq_domain { > struct device *dev; > u32 ti_sci_id; > u32 type; > + u32 *mapping; > }; > > static struct irq_chip ti_sci_intr_irq_chip = { > @@ -99,6 +101,23 @@ static int ti_sci_intr_xlate_irq(struct ti_sci_intr_irq_domain *intr, u32 irq) > return -ENOENT; > } > > +/** > + * ti_sci_intr_free_irq - Free the irq entry in the out_irq <-> hwirq mapping table > + * @intr: IRQ domain corresponding to Interrupt Router > + * @out_irq: Out irq number > + */ > +static void ti_sci_intr_free_irq(struct ti_sci_intr_irq_domain *intr, u16 out_irq) > +{ > + u16 start = intr->out_irqs->desc->start; > + u16 num = intr->out_irqs->desc->num; > + u16 start_sec = intr->out_irqs->desc->start_sec; > + > + if (out_irq < start + num) > + intr->mapping[out_irq - start] = 0xFFFFFFFF; > + else > + intr->mapping[out_irq - start_sec + num] = 0xFFFFFFFF; > +} > + > /** > * ti_sci_intr_irq_domain_free() - Free the specified IRQs from the domain. > * @domain: Domain to which the irqs belong > @@ -118,11 +137,30 @@ static void ti_sci_intr_irq_domain_free(struct irq_domain *domain, > intr->sci->ops.rm_irq_ops.free_irq(intr->sci, > intr->ti_sci_id, data->hwirq, > intr->ti_sci_id, out_irq); > + ti_sci_intr_free_irq(intr, out_irq); > ti_sci_release_resource(intr->out_irqs, out_irq); > irq_domain_free_irqs_parent(domain, virq, 1); > irq_domain_reset_irq_data(data); > } > > +/** > + * ti_sci_intr_add_irq - Add the irq entry in the out_irq <-> hwirq mapping table > + * @intr: IRQ domain corresponding to Interrupt Router > + * @hwirq: Input irq number > + * @out_irq: Out irq number > + */ > +static void ti_sci_intr_add_irq(struct ti_sci_intr_irq_domain *intr, u32 hwirq, u16 out_irq) > +{ > + u16 start = intr->out_irqs->desc->start; > + u16 num = intr->out_irqs->desc->num; > + u16 start_sec = intr->out_irqs->desc->start_sec; > + > + if (out_irq < start + num) > + intr->mapping[out_irq - start] = hwirq; > + else > + intr->mapping[out_irq - start_sec + num] = hwirq; > +} I'll bite: you already have a full resource allocator that is used for all sort of things. Why isn't this cached by the resource allocator itself? Why is this an irqchip specific thing? I expect other users of the same API to have the same needs. M. -- Without deviation from the norm, progress is not possible.