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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: "Surendrakumar Upadhyay\,
	TejaskumarX"  <tejaskumarx.surendrakumar.upadhyay@intel.com>,
	"Vivi\, Rodrigo" <rodrigo.vivi@intel.com>,
	"airlied\@linux.ie" <airlied@linux.ie>,
	"daniel\@ffwll.ch" <daniel@ffwll.ch>,
	"intel-gfx\@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel\@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"linux-kernel\@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Ausmus\, James" <james.ausmus@intel.com>, "Souza\,
	Jose" <jose.souza@intel.com>,
	"ville.syrjala\@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"De Marchi\, Lucas" <lucas.demarchi@intel.com>, "Pandey\,
	Hariom" <hariom.pandey@intel.com>
Subject: Re: [PATCH 1/2] drm/i915/jsl: Split EHL/JSL platform info and PCI ids
Date: Mon, 28 Sep 2020 20:32:38 +0300	[thread overview]
Message-ID: <87sgb1olhl.fsf@intel.com> (raw)
In-Reply-To: <20200928172447.GA2157395@mdroper-desk1.amr.corp.intel.com>

On Mon, 28 Sep 2020, Matt Roper <matthew.d.roper@intel.com> wrote:
> Why are we adding IS_JASPERLAKE at all?  EHL/JSL are documented as the
> same graphics IP, but are paired with different PCHs in the final SoCs,
> which is what causes the minor differences in programming.  My
> understanding is that the voltage programming differences are ultimately
> due to that difference in PCH so we should just use HAS_PCH_MCC (EHL)
> and HAS_PCH_JSP (JSL) to distinguish which type of programming is needed
> rather than using a platform test.

Good point. If the difference is in the PCH, then of course the PCH
check should be used instead. Which avoids the problem altogether.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2020-09-28 17:55 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-28  8:09 [PATCH 0/2] drm/i915/jsl: Update JasperLake Voltage swing table Tejas Upadhyay
2020-09-28  8:09 ` [PATCH 1/2] drm/i915/jsl: Split EHL/JSL platform info and PCI ids Tejas Upadhyay
2020-09-28 13:37   ` Jani Nikula
     [not found]     ` <SN6PR11MB3421571FA9A490C67E0E9D82DF350@SN6PR11MB3421.namprd11.prod.outlook.com>
2020-09-28 17:14       ` Jani Nikula
2020-09-28 17:24         ` Matt Roper
2020-09-28 17:32           ` Jani Nikula [this message]
2020-09-28  8:09 ` [PATCH 2/2] drm/i915/edp/jsl: Update vswing table for HBR and HBR2 Tejas Upadhyay
2020-09-28 13:43   ` [Intel-gfx] " Jani Nikula
2020-09-28 14:15     ` James Ausmus
2020-09-28 15:02       ` Ville Syrjälä
2020-09-28 17:20         ` Jani Nikula
2020-09-29 12:45           ` Ville Syrjälä
     [not found]     ` <SN6PR11MB3421725FE60CC7930FC02AB6DF350@SN6PR11MB3421.namprd11.prod.outlook.com>
2020-09-28 17:15       ` Jani Nikula
2020-09-28 23:07         ` Lucas De Marchi
2020-09-28 23:10           ` Matt Roper
2020-09-29  7:30             ` Jani Nikula

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