From: Thomas Gleixner <tglx@linutronix.de>
To: Wojciech Kudla <wk.kernel@gmail.com>, linux-kernel@vger.kernel.org
Cc: mingo@redhat.com, hpa@zytor.com, x86@kernel.org,
Steven Rostedt <rostedt@goodmis.org>,
Will Deacon <will@kernel.org>
Subject: Re: x86/smp: adding new trace points
Date: Wed, 13 May 2020 18:43:32 +0200 [thread overview]
Message-ID: <87sgg323bf.fsf@nanos.tec.linutronix.de> (raw)
In-Reply-To: <b3e3c317-17e4-081f-0bb6-3e6f291f8b86@gmail.com>
Wojciech Kudla <wk.kernel@gmail.com> writes:
> On 13/05/2020 13:24, Thomas Gleixner wrote:
>
>> Why would the SMP call function single interrupt go through the
>> PLATFORM_IPI_VECTOR? It goes as the name says through the
>> CALL_FUNCTION_SINGLE_VECTOR.
>>
>
> Wrong vector, my bad.
>
> However 2) still stands in my opinion. We don't have "ipi raise" trace
> point for x86. RESCHEDULE_VECTOR, CALL_FUNCTION_SINGLE_VECTOR, as
> well as TLB invalidation vectors are essentially
> inter-processor-interrupts if I'm not mistaken. Would a patch adding
> such trace point be considered here?
Maybe.
Though that IPI tracing is inconsistent across architectures. I'm not
really interested to have yet another x86 variant which is slightly
different than anything else.
ARM and ARM64 share generic tracepoints for that, though the actual
tracepoint invocation is in the architecture specific code.
If at all we really want to have the common IPIs which are required for
SMP support covered by generic tracepoints and have them in the generic
code and not sprinkled all over arch/*
Thanks,
tglx
next prev parent reply other threads:[~2020-05-13 16:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <4d54953b-f968-63f5-569f-9e09bc0f361c@gmail.com>
2020-05-12 11:39 ` x86/smp: adding new trace points Wojciech Kudla
2020-05-13 12:24 ` Thomas Gleixner
2020-05-13 14:42 ` Wojciech Kudla
2020-05-13 16:43 ` Thomas Gleixner [this message]
2020-05-13 18:42 ` Wojciech Kudla
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