[PATCH] x86: Report Intel platform_id in /proc/cpuinfo

Andi Kleen
2016-09-23T18:02:38Z

From: Andi Kleen <ak@linux.intel.com>

We have a need to distinguish systems based on their platform ID.
For example this is useful to distinguish systems with L4 cache
versus ones without.

There is a 3 bit identifier (also called processor flags) in
the IA32_PLATFORM_ID MSR that can give a more fine grained
identification of the CPU than just the model number/stepping.

IA32_PLATFORM_ID is architectural.

The MSR can be also accessed through /dev/cpu/*/msr, but that
requires root and is awkward.

The patch moves the reading of PLATFORM_INFO from the
(late) microcode driver code into the main intel CPU initialization
path and then also prints it in /proc/cpuinfo

v2: Handle 0 platform_id. Fix commit message.
v3: Move some code to cpu/intel.c
v4: Update description too.
Cc: hmh@hmh.eng.br
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/include/asm/processor.h | 2 ++
arch/x86/kernel/cpu/intel.c | 9 +++++++++
arch/x86/kernel/cpu/microcode/intel.c | 8 ++------
arch/x86/kernel/cpu/proc.c | 2 ++
4 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 63def9537a2d..c1313b3f3e59 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -135,6 +135,8 @@ struct cpuinfo_x86 {
/* Index into per_cpu list: */
u16 cpu_index;
u32 microcode;
+ u32 platform_id;
+ u8 has_platform_id;
};

#define X86_VENDOR_INTEL 0
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index fcd484d2bb03..b9f139716636 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -210,6 +210,15 @@ static void early_init_intel(struct cpuinfo_x86 *c)
c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);
}

+ if ((c->x86_model >= 5) || (c->x86 > 6)) {
+ unsigned val[2];
+
+ /* get processor flags from MSR 0x17 */
+ rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
+ c->platform_id = (val[1] >> 18) & 7;
+ c->has_platform_id = true;
+ }
+
check_mpx_erratum(c);
}

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index cdc0deab00c9..fab07e49192e 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -855,17 +855,13 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
{
static struct cpu_signature prev;
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
- unsigned int val[2];

memset(csig, 0, sizeof(*csig));

csig->sig = cpuid_eax(0x00000001);

- if ((c->x86_model >= 5) || (c->x86 > 6)) {
- /* get processor flags from MSR 0x17 */
- rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
- csig->pf = 1 << ((val[1] >> 18) & 7);
- }
+ if (c->has_platform_id)
+ csig->pf = 1 << c->platform_id;

csig->rev = c->microcode;

diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index 18ca99f2798b..5345d50ed709 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -76,6 +76,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_puts(m, "stepping\t: unknown\n");
if (c->microcode)
seq_printf(m, "microcode\t: 0x%x\n", c->microcode);
+ if (c->has_platform_id)
+ seq_printf(m, "platform_id\t: %d\n", c->platform_id);

if (cpu_has(c, X86_FEATURE_TSC)) {
unsigned int freq = cpufreq_quick_get(cpu);
--
2.5.5