From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3E1B394498 for ; Tue, 7 Apr 2026 11:48:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775562524; cv=none; b=onfDBwk3aqE3r5909eqkiC8YvFjZnvw4vJ1ij2EVg5zMZkdhdv2CS9/6VqfMWaGUDHAlpXGxkJJM2gCLQTRknI0ifKwDweJ54VYq8gqjUzRXNzjC7VMQnI/3eAWsoN4iCQ7zcq+BMtJ1Vs3Gx+GxWPT9f1odY+FDEV9ebDIsPdw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775562524; c=relaxed/simple; bh=BjVuOjI1QhnGNHiP3xYcNfuccyBOIqbuiMz0Wq5xNS4=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=ISfH+XCAMDuOfBVKpOASrbMT5qmRUo9bKvB+ZZM1BmWmSwIzc4SlHW8BY0di59eF9ZBuwHpQtBknf25IrFo4+FrFC0GhK+zizC1v9mBF0qZt7BGe+6OwPQnCu1MtgzSyU4gmEw6ab0qRfIKrLwstYSjF3pyR1nHWHdIBaRGkUYE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=0IxiLLLC; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=d+LPaln9; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="0IxiLLLC"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="d+LPaln9" From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1775562521; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BjVuOjI1QhnGNHiP3xYcNfuccyBOIqbuiMz0Wq5xNS4=; b=0IxiLLLCOBPRHaIOYcw6Yd4Rnkvhgp/8QG6jnvl4LSogkStbEKzdTeQ5XrXcPQX1l10cvJ N5EOGGwYbCSSRYDggsWtKABd8dM7ixPAS05dZcvSZRvnwsF57MayY+o4nZ68VDB3PuEzwn T3F3caaOOa40VY9tw6otQOock7zHuXrYnb7O7ulG528YUTsBZCMVpDH3ggxml2Aje9dKyT 25clCY8jkX4KCIv86Xlgg0x0gMRXVObU+Pfk8rlfmJhIfhTiaow7q+H1lbbr4Rhg8yP+mA CHYGq28rJuUiUdIW9J7VS35klYOndF/qhASALV/GakRinLkF7XjUCgx8IhWDKw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1775562521; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BjVuOjI1QhnGNHiP3xYcNfuccyBOIqbuiMz0Wq5xNS4=; b=d+LPaln9yej9Cx+xdt9S0nXeZsSFTpu2HqKODSNOHXu+C+OPrPp7X1DupsRKhOJZYO/Yt1 5IQCpqI3MqLoahDg== To: litaliano00 Cc: palmer@dabbelt.com, pjw@kernel.org, aou@eecs.berkeley.edu, alex@ghiti.fr, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] riscv: Add WFI to secondary hart spinwait loop In-Reply-To: References: <20260407074534.59179-1-litaliano00.contact@gmail.com> <20260407084514.syOsks4D@linutronix.de> Date: Tue, 07 Apr 2026 13:48:41 +0200 Message-ID: <87tstnuh2e.fsf@yellow.woof> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable litaliano00 writes: > You are correct to question this. There is no interrupt sent to the > waiting harts in the current spinwait design =E2=80=94 the primary hart s= imply > writes to __cpu_spinwait_stack_pointer and __cpu_spinwait_task_pointer. > A bare WFI would cause secondary harts to sleep indefinitely since no > IPI is issued after those writes. > > The correct fix would require the primary hart to send an IPI to all > waiting harts after populating the pointers, which is a more involved > change. The current patch is insufficient as-is. Yeah, that's also what I would do. > I will send a v2 that reverts this change. Apologies for the noise. There's no need for that, this patch has not been applied. Best regards, Nam