From: Thomas Gleixner <tglx@kernel.org>
To: Uros Bizjak <ubizjak@gmail.com>, LKML <linux-kernel@vger.kernel.org>
Cc: "Mathieu Desnoyers" <mathieu.desnoyers@efficios.com>,
"André Almeida" <andrealmeid@igalia.com>,
"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
"Carlos O'Donell" <carlos@redhat.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Florian Weimer" <fweimer@redhat.com>,
"Rich Felker" <dalias@aerifal.cx>,
"Torvald Riegel" <triegel@redhat.com>,
"Darren Hart" <dvhart@infradead.org>,
"Ingo Molnar" <mingo@kernel.org>,
"Davidlohr Bueso" <dave@stgolabs.net>,
"Arnd Bergmann" <arnd@arndb.de>,
"Liam R . Howlett" <Liam.Howlett@oracle.com>
Subject: Re: [patch 8/8] x86/vdso: Implement __vdso_futex_robust_try_unlock()
Date: Wed, 18 Mar 2026 09:21:56 +0100 [thread overview]
Message-ID: <87tsudmtsr.ffs@tglx> (raw)
In-Reply-To: <64921c86-b4f1-43f8-b03e-addbd1be19a0@gmail.com>
On Tue, Mar 17 2026 at 16:33, Uros Bizjak wrote:
> On 3/16/26 18:13, Thomas Gleixner wrote:
>> +#ifdef CONFIG_COMPAT
>
> The following asm template can be substantially improved.
In theory.
>> +# define ASM_CLEAR_PTR \
>> + " testl $1, (%[pop]) \n" \
>
> Please use byte-wide instruction, TESTB with address operand modifier,
> "%a[pop]" instead of "(%[pop])":
>
> testb $1, %a[pop]
New fangled %a syntax seems to work. Didn't know about that. Though I'm
not convinced that this is an improvement. At least not for someone who
is used to read/write plain old school ASM for several decades.
>> + " jz .Lop64 \n" \
>> + " movl $0, (%[pad]) \n" \
>
> Here you can reuse zero-valued operand "val" and use address operand
> modifier. Please note %k modifier.
>
> movl %k[val], %a[pad]
...
> movq %[val], %a[pad]
But this one does not and _cannot_ work.
Error: incorrect register `%rcx' used with `l' suffix
Which is obvious because of the initalization:
[val] "r" (0UL)
which makes it explicitely R$$. If you change the initialization back to
[val] "r" (0) // or (0U)
the failure unsurprisingly becomes
Error: incorrect register `%ecx' used with `q' suffix
So much for the theory....
<SNIP>
>> + ASM_PAD_CONSTRAINT
tons of useless quoted text
>> +#endif /* _ASM_X86_FUTEX_ROBUST_H */
</SNIP>
Can you please trim your replies properly?
Thanks,
tglx
next prev parent reply other threads:[~2026-03-18 8:22 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 17:12 [patch 0/8] futex: Address the robust futex unlock race for real Thomas Gleixner
2026-03-16 17:12 ` [patch 1/8] futex: Move futex task related data into a struct Thomas Gleixner
2026-03-16 17:55 ` Mathieu Desnoyers
2026-03-17 2:24 ` André Almeida
2026-03-17 9:52 ` Thomas Gleixner
2026-03-16 17:13 ` [patch 2/8] futex: Move futex related mm_struct " Thomas Gleixner
2026-03-16 18:00 ` Mathieu Desnoyers
2026-03-16 17:13 ` [patch 3/8] futex: Provide UABI defines for robust list entry modifiers Thomas Gleixner
2026-03-16 18:02 ` Mathieu Desnoyers
2026-03-17 2:38 ` André Almeida
2026-03-17 9:53 ` Thomas Gleixner
2026-03-16 17:13 ` [patch 4/8] futex: Add support for unlocking robust futexes Thomas Gleixner
2026-03-16 18:24 ` Mathieu Desnoyers
2026-03-17 16:17 ` André Almeida
2026-03-17 20:46 ` Peter Zijlstra
2026-03-17 22:40 ` Thomas Gleixner
2026-03-18 8:02 ` Peter Zijlstra
2026-03-18 8:06 ` Florian Weimer
2026-03-18 14:47 ` Peter Zijlstra
2026-03-18 16:03 ` Thomas Gleixner
2026-03-16 17:13 ` [patch 5/8] futex: Add robust futex unlock IP range Thomas Gleixner
2026-03-16 18:36 ` Mathieu Desnoyers
2026-03-17 19:19 ` André Almeida
2026-03-16 17:13 ` [patch 6/8] futex: Provide infrastructure to plug the non contended robust futex unlock race Thomas Gleixner
2026-03-16 18:35 ` Mathieu Desnoyers
2026-03-16 20:29 ` Thomas Gleixner
2026-03-16 20:52 ` Mathieu Desnoyers
2026-03-16 17:13 ` [patch 7/8] x86/vdso: Prepare for robust futex unlock support Thomas Gleixner
2026-03-16 17:13 ` [patch 8/8] x86/vdso: Implement __vdso_futex_robust_try_unlock() Thomas Gleixner
2026-03-16 19:19 ` Mathieu Desnoyers
2026-03-16 21:02 ` Thomas Gleixner
2026-03-16 22:35 ` Mathieu Desnoyers
2026-03-16 21:14 ` Thomas Gleixner
2026-03-16 21:29 ` Thomas Gleixner
2026-03-17 7:25 ` Thomas Weißschuh
2026-03-17 9:51 ` Thomas Gleixner
2026-03-17 11:17 ` Thomas Weißschuh
2026-03-18 16:17 ` Thomas Gleixner
2026-03-19 7:41 ` Thomas Weißschuh
2026-03-19 8:53 ` Florian Weimer
2026-03-19 9:04 ` Thomas Weißschuh
2026-03-19 9:08 ` Peter Zijlstra
2026-03-19 23:31 ` Thomas Gleixner
2026-03-19 10:36 ` Sebastian Andrzej Siewior
2026-03-19 10:49 ` Thomas Weißschuh
2026-03-19 10:55 ` Sebastian Andrzej Siewior
2026-03-17 8:28 ` Florian Weimer
2026-03-17 9:36 ` Thomas Gleixner
2026-03-17 10:37 ` Florian Weimer
2026-03-17 22:32 ` Thomas Gleixner
2026-03-18 22:08 ` Thomas Gleixner
2026-03-18 22:10 ` Peter Zijlstra
2026-03-19 2:05 ` André Almeida
2026-03-19 7:10 ` Thomas Gleixner
2026-03-17 15:33 ` Uros Bizjak
2026-03-18 8:21 ` Thomas Gleixner [this message]
2026-03-18 8:32 ` Uros Bizjak
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