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From: Thomas Gleixner <tglx@kernel.org>
To: Jon Hunter <jonathanh@nvidia.com>,
	Radu Rendec <rrendec@redhat.com>,
	Manivannan Sadhasivam <mani@kernel.org>
Cc: "Daniel Tsai" <danielsftsai@google.com>,
	"Marek Behún" <kabel@kernel.org>,
	"Krishna Chaitanya Chundru" <quic_krichai@quicinc.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Brian Masney" <bmasney@redhat.com>,
	"Eric Chanudet" <echanude@redhat.com>,
	"Alessandro Carminati" <acarmina@redhat.com>,
	"Jared Kangas" <jkangas@redhat.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>
Subject: [PATCH] genirq/redirect: Prevent writing MSI message on affinity change
Date: Tue, 27 Jan 2026 22:30:16 +0100	[thread overview]
Message-ID: <87tsw6aglz.ffs@tglx> (raw)
In-Reply-To: <b5e33957-1b8d-436b-888e-2b6f13d30782@nvidia.com>

The interrupts which are handled by the redirection infrastructure provide
a irq_set_affinity() callback, which solely determines the target CPU for
redirection via irq_work and und updates the effective affinity mask.

Contrary to regular MSI interrupts this affinity setting does not change
the underlying interrupt message as the message is only created at setup
time to deliver to the demultiplexing interrupt.

Therefore the message write in msi_domain_set_affinity() is a pointless
exercise. In principle the write is harmless, but a Tegra system exposes a
full system hang during suspend due to that write.

It's unclear why the check for the PCI device state PCI_D0 in
pci_msi_domain_write_msg(), which prevents the actual hardware access if
a device is powered down state, fails on this particular system, but
that's a different problem which needs to be investigated by the Tegra
experts.

The irq_set_affinity() callback can advise msi_domain_set_affinity() not to
write the MSI message by returning IRQ_SET_MASK_OK_DONE instead of
IRQ_SET_MASK_OK. Do exactly that.

Just to make it clear again:

This is not a correctness issue of the redirection code as returning
IRQ_SET_MASK_OK in that context is completely correct. From the core
code point of view this is solely a optimization to avoid an redundant
hardware write.

As a byproduct it papers over the underlying problem on the Tegra platform,
which fails to put the PCIe device[s] out of PCI_D0 despite the fact that
the devices and busses have been shut down. The redirect infrastructure
just unearthed the underlying issue, which is prone to happen in quite some
other code paths which use the PCI_D0 check to prevent hardware access to
powered down devices.

This therefore has neither a 'Fixes:' nor a 'Closes:' tag associated as the
underlying problem, which is outside the scope of the interrupt code, is
still unresolved.

Reported-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/all/4e5b349c-6599-4871-9e3b-e10352ae0ca0@nvidia.com
---
 kernel/irq/chip.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -1495,7 +1495,7 @@ int irq_chip_redirect_set_affinity(struc
 	WRITE_ONCE(redir->target_cpu, cpumask_first(dest));
 	irq_data_update_effective_affinity(data, dest);
 
-	return IRQ_SET_MASK_OK;
+	return IRQ_SET_MASK_OK_DONE;
 }
 EXPORT_SYMBOL_GPL(irq_chip_redirect_set_affinity);
 #endif

  reply	other threads:[~2026-01-27 21:30 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-28 21:20 [PATCH v3 0/3] Enable MSI affinity support for dwc PCI Radu Rendec
2025-11-28 21:20 ` [PATCH v3 1/3] genirq: Add interrupt redirection infrastructure Radu Rendec
2025-12-15 21:34   ` [tip: irq/msi] " tip-bot2 for Radu Rendec
2025-11-28 21:20 ` [PATCH v3 2/3] PCI: dwc: Code cleanup Radu Rendec
2025-12-15 21:34   ` [tip: irq/msi] " tip-bot2 for Radu Rendec
2025-11-28 21:20 ` [PATCH v3 3/3] PCI: dwc: Enable MSI affinity support Radu Rendec
2025-12-15 21:34   ` [tip: irq/msi] " tip-bot2 for Radu Rendec
2026-01-06  9:53     ` Jon Hunter
2026-01-06 15:07       ` Radu Rendec
2026-01-07  1:13         ` Radu Rendec
2026-01-20 18:01   ` [PATCH v3 3/3] " Jon Hunter
2026-01-20 22:30     ` Radu Rendec
2026-01-21 14:00       ` Jon Hunter
2026-01-22 23:31         ` Radu Rendec
2026-01-23 13:25           ` Jon Hunter
2026-01-26  7:59           ` Thomas Gleixner
2026-01-26 22:07             ` Jon Hunter
2026-01-26 22:26               ` Radu Rendec
2026-01-27 10:30                 ` Thomas Gleixner
2026-01-27 13:34                   ` Thomas Gleixner
2026-01-27 17:09                     ` Jon Hunter
2026-01-27 21:30                       ` Thomas Gleixner [this message]
2026-01-29 22:51                         ` [tip: irq/msi] genirq/redirect: Prevent writing MSI message on affinity change tip-bot2 for Thomas Gleixner
2026-03-26  3:48                       ` [PATCH v3 3/3] PCI: dwc: Enable MSI affinity support Tsai Sung-Fu
2026-03-26 12:52                         ` Thomas Gleixner

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