From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21DAD2571AA for ; Thu, 4 Sep 2025 09:35:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756978505; cv=none; b=qcRBMfJhIxnol+nRaQyYe7uB3tCR3qvAV3JQq13XvWf47kTkK2+oIatgAkwvwuksOtMadDp88RM0Gm2VJtvdtHqon6QJS9utRX3GjVYOhX0izQ27ZjJ1/ttlqd0qwyogzVYSp/GxUDeC8VgGZ16h+Kka7+cf9dtX6AgnJLnhDDg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756978505; c=relaxed/simple; bh=99XBGOZxR9KclNmgU94R23/33YjiM2agRYpbBOc1qEs=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=MdDT7YLMyHzKbpYzAnwUtytzps44fB5KSs0/NXew0OpebgWVitn2jHzQyIGIQBpkV7ILQEw8ekVagWquXFpWXOSiBjhV8Hd5GdR/8q5QxoVK0/RZM4mX4P5DzTROgWlortWNfX40B9eyD0rSA6m56iHpxJRzNH2C53Wdqz47d74= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lZ6EVn1m; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lZ6EVn1m" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D9FA0C4CEF0; Thu, 4 Sep 2025 09:35:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1756978504; bh=99XBGOZxR9KclNmgU94R23/33YjiM2agRYpbBOc1qEs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=lZ6EVn1mEEznaJ1wYd5M5WnFrg9IhZOAHELWA5PqrVMOsYcquIMbFGBhF24iuQGh6 WhZfmHbwze427vWBHO/boZIFy8Nu9IhWcKtDfza9qVhf67mxScKkazV/yyPf/ze9Td S/c833oiBA3hjAYAHXv0h+yo3phUq0EZgnORTP9BSjmqJGbXgLGl+aZcV7PBS8UkNR hCDG5vSXEkRM0GtC3dDYO/xQApdES7Fc/hXxANv2IO6MSP4Au2QXRndYTLocVlVKVU JgBunm7l8om7rAdiKND2kHuucgND+CY++yxFzwgzAyR+2ofygddduMOsSmLTAKGHz8 7LEP1SLcbJLBw== Received: from [131.175.126.3] (helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1uu6Mw-00000003FtY-2opD; Thu, 04 Sep 2025 09:35:02 +0000 Date: Thu, 04 Sep 2025 10:35:02 +0100 Message-ID: <87tt1izhkp.wl-maz@kernel.org> From: Marc Zyngier To: Christian Bruel Cc: , , , , Subject: Re: [PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment In-Reply-To: <20250902091045.220847-1-christian.bruel@foss.st.com> References: <20250902091045.220847-1-christian.bruel@foss.st.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 131.175.126.3 X-SA-Exim-Rcpt-To: christian.bruel@foss.st.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, fabrice.gasnier@foss.st.com, mani@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false This is actually v3, right? On Tue, 02 Sep 2025 10:10:45 +0100, Christian Bruel wrote: > > The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the > low-order bits of the MSI Message DATA register to encode nr_irqs interrupt > numbers in the log2(nr_irqs) bits for the domain. > > The problem arises if the base vector (GICV2m base spi) is not aligned with > nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base > vector conflict with the nr_irqs masking, causing the wrong MSI interrupt > to be identified. > > To fix this, use bitmap_find_next_zero_area_off() instead of > bitmap_find_free_region() to align the initial base vector with nr_irqs. > > Signed-off-by: Christian Bruel > --- > Changes in v2: > (Marc Zyngier) > - Move align_off definition inside the loop > - Reworked Commit Message > > Changes in v1: > (Marc Zyngier) > - Replace the incorrect usage of msi_attrib.multiple with nr_irqs > - Reworked changelog > --- > drivers/irqchip/irq-gic-v2m.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c > index 24ef5af569fe..8a3410c2b7b5 100644 > --- a/drivers/irqchip/irq-gic-v2m.c > +++ b/drivers/irqchip/irq-gic-v2m.c > @@ -153,14 +153,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, > { > msi_alloc_info_t *info = args; > struct v2m_data *v2m = NULL, *tmp; > - int hwirq, offset, i, err = 0; > + int hwirq, i, err = 0; > + unsigned long offset; > + unsigned long align_mask = nr_irqs - 1; > > spin_lock(&v2m_lock); > list_for_each_entry(tmp, &v2m_nodes, entry) { > - offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis, > - get_count_order(nr_irqs)); > - if (offset >= 0) { > + unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask); > + > + offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0, > + nr_irqs, align_mask, align_off); > + if (offset < tmp->nr_spis) { > v2m = tmp; > + bitmap_set(v2m->bm, offset, nr_irqs); > break; > } > } Reviewed-by: Marc Zyngier M. -- Jazz isn't dead. It just smells funny.