From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64CEBC43334 for ; Sat, 16 Jul 2022 09:30:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231956AbiGPJab (ORCPT ); Sat, 16 Jul 2022 05:30:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229436AbiGPJa3 (ORCPT ); Sat, 16 Jul 2022 05:30:29 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B7DFF237EA for ; Sat, 16 Jul 2022 02:30:28 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CFB8760EF9 for ; Sat, 16 Jul 2022 09:30:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 358B3C34114; Sat, 16 Jul 2022 09:30:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657963827; bh=xALARx27ExrETfczld+coksaXc6HSQOm9eT+LzkxAGc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=s1wyWdbiKf4wfnGzA6xiOSS2h/88MqQZIF5ud4qmofP/kdOCn8V/L1t6jF7shkZ24 GqDeTCnJtgThgT+5WNRvjfN8qOLBRuZiRg5jTnqt1eEFdPgWMM46qfpBDSb/d9tzUg 3mozFRYqDhLpE1ePEorpT5fTkz+kcOtVBcstdNG0pfw6+GEJv5KZ+CIqo1NlDoL8kj BGjEmO/O2oMIqOb8HhExC0/K5EulEawpEskIdzUo+LdGbKoxFBOJj6xgeaofzmrkM4 obdtovwFCChuit5QQ+J23Aq5AQrkq7vtlBIGWS58ADQevg2RZnKPcEgx9L8cQFPFP9 5jNrHRP8v/kCA== Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oCe80-007qgf-Nb; Sat, 16 Jul 2022 10:30:24 +0100 Date: Sat, 16 Jul 2022 10:30:19 +0100 Message-ID: <87tu7h4d78.wl-maz@kernel.org> From: Marc Zyngier To: wangwudi Cc: , Thomas Gleixner Subject: Re: [PATCH] drivers: irqchip: Allocate alignment addr by ITS_BASER.Page_size In-Reply-To: <1657955136-6622-1-git-send-email-wangwudi@hisilicon.com> References: <1657955136-6622-1-git-send-email-wangwudi@hisilicon.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: wangwudi@hisilicon.com, linux-kernel@vger.kernel.org, tglx@linutronix.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 16 Jul 2022 08:05:36 +0100, wangwudi wrote: > > The description of the ITS_BASER.Physical_Address field in the ARM GIC spec is as > follows: > "The address must be aligned to the size specified in the Page Size field." > The Page_Size field in ITS_BASER might be RO. > > Currently, the address is aligned based on the system page_size, not the HW > Page_Size field. In some case, this is in contradiction with the spec. > > For example: > ITS_BASER.Page_Size indicate 16K, and kernel page size is 4K. > If HW need 4K-size memory, the driver may alloc a 4K aligned address. > This has been proven in hardware. Ah, interesting bug. Thanks for bringing this up. Can you describe how this occurs? I suspect you are using indirect tables. > > Cc: Thomas Gleixner > Cc: Marc Zyngier > Signed-off-by: wangwudi > --- > drivers/irqchip/irq-gic-v3-its.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > index 5ff09de6c48f..0e25e887d45c 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -2310,6 +2310,9 @@ static int its_setup_baser(struct its_node *its, struct its_baser *baser, > order = get_order(GITS_BASER_PAGES_MAX * psz); > } > > + if ((psz > PAGE_SIZE) && (PAGE_ORDER_TO_SIZE(order) < psz)) { > + order = get_order(psz); > + } > page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); > if (!page) > return -ENOMEM; However, I don't see how you end-up with the incorrect value here. * No indirect table: alloc_its_tables(): order = get_order(baser->psz); * Indirect tables: alloc_its_tables(): order = get_order(baser->psz); its_parse_indirect_baser(): new_order = *order; new_order = max_t(u32, get_order(esz << ids), new_order); So in both cases, we should end-up with order >= get_order(psz). Clearly, I'm missing a path, but your commit message doesn't make it obvious. Can you please enlighten me? Thanks, M. -- Without deviation from the norm, progress is not possible.