From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932097AbcBWWXt (ORCPT ); Tue, 23 Feb 2016 17:23:49 -0500 Received: from smtp06.smtpout.orange.fr ([80.12.242.128]:16709 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755471AbcBWWXq (ORCPT ); Tue, 23 Feb 2016 17:23:46 -0500 X-ME-Helo: belgarion X-ME-Auth: amFyem1pay5yb2JlcnRAb3JhbmdlLmZy X-ME-Date: Tue, 23 Feb 2016 23:23:45 +0100 X-ME-IP: 109.220.219.11 From: Robert Jarzmik To: Ard Biesheuvel , Dan Williams Cc: Arnd Bergmann , Russell King - ARM Linux , "linux-kernel\@vger.kernel.org" , "linux-arm-kernel\@lists.infradead.org" , Nicolas Pitre Subject: Re: [RFC PATCH 1/2] memremap: add arch specific hook for MEMREMAP_WB mappings References: <1456149728-16706-1-git-send-email-ard.biesheuvel@linaro.org> <1456149728-16706-2-git-send-email-ard.biesheuvel@linaro.org> <20160222200227.GF19428@n2100.arm.linux.org.uk> <20160223115835.GI19428@n2100.arm.linux.org.uk> X-URL: http://belgarath.falguerolles.org/ Date: Tue, 23 Feb 2016 23:23:42 +0100 In-Reply-To: (Dan Williams's message of "Tue, 23 Feb 2016 09:21:44 -0800") Message-ID: <87twkzukup.fsf@belgarion.home> User-Agent: Gnus/5.130008 (Ma Gnus v0.8) Emacs/24.4 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dan Williams writes: > On Tue, Feb 23, 2016 at 4:26 AM, Ard Biesheuvel > wrote: >> On 23 February 2016 at 13:03, Ard Biesheuvel wrote: >>> On 23 February 2016 at 12:58, Russell King - ARM Linux >>> wrote: >>>> On Mon, Feb 22, 2016 at 09:35:24PM +0100, Ard Biesheuvel wrote: >> OK, I see what you mean. I find it unfortunate that ioremap_cache() >> instances are blindly being replaced with memremap(), and I wonder if >> this wasted test by and/or cc'ed to people who can actually test this >> driver. Dan? Actually I have the hardware to test it. And I also know what is behind : - it's a CFI NOR based memory - these are Intel StrataFlash 28F128J3A chips - as a CFI memory it is mapped on the system bus - from a read perspective, it behaves like a normal memory - but once the first write reaches the CFI, everything changes (the address space layout doesn't have the same meaning, be that becoming a status code or something else). In these conditions reordering of writes versus reads, merging reads after a write or coalescing writes is a recipe for disaster. All of this to say I can make a small discrete number of tests (less than 10 write or erase ones to preserve the precious NOR). Cheers. -- Robert