From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E751C433E0 for ; Sun, 24 Jan 2021 16:00:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 176A622795 for ; Sun, 24 Jan 2021 16:00:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726242AbhAXP7y (ORCPT ); Sun, 24 Jan 2021 10:59:54 -0500 Received: from mail.kernel.org ([198.145.29.99]:41890 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725798AbhAXP7v (ORCPT ); Sun, 24 Jan 2021 10:59:51 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9CDCB225A9; Sun, 24 Jan 2021 15:59:10 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1l3hnA-009kUq-H1; Sun, 24 Jan 2021 15:59:08 +0000 Date: Sun, 24 Jan 2021 15:59:07 +0000 Message-ID: <87wnw2jph0.wl-maz@kernel.org> From: Marc Zyngier To: Catalin Marinas Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, Will Deacon , Mark Rutland , David Brazdil , Alexandru Elisei , Ard Biesheuvel , Jing Zhang , Ajay Patil , Prasad Sodagudi , Srinivas Ramana , James Morse , Julien Thierry , Suzuki K Poulose , kernel-team@android.com Subject: Re: [PATCH v4 14/21] arm64: Honor VHE being disabled from the command-line In-Reply-To: References: <20210118094533.2874082-1-maz@kernel.org> <20210118094533.2874082-15-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, will@kernel.org, mark.rutland@arm.com, dbrazdil@google.com, alexandru.elisei@arm.com, ardb@kernel.org, jingzhangos@google.com, pajay@qti.qualcomm.com, psodagud@codeaurora.org, sramana@codeaurora.org, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 23 Jan 2021 14:07:53 +0000, Catalin Marinas wrote: > > On Mon, Jan 18, 2021 at 09:45:26AM +0000, Marc Zyngier wrote: > > diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S > > index 59820f9b8522..bbab2148a2a2 100644 > > --- a/arch/arm64/kernel/hyp-stub.S > > +++ b/arch/arm64/kernel/hyp-stub.S > > @@ -77,13 +77,24 @@ SYM_CODE_END(el1_sync) > > SYM_CODE_START_LOCAL(mutate_to_vhe) > > // Sanity check: MMU *must* be off > > mrs x0, sctlr_el2 > > - tbnz x0, #0, 1f > > + tbnz x0, #0, 2f > > > > // Needs to be VHE capable, obviously > > mrs x0, id_aa64mmfr1_el1 > > ubfx x0, x0, #ID_AA64MMFR1_VHE_SHIFT, #4 > > - cbz x0, 1f > > + cbz x0, 2f > > > > + // Check whether VHE is disabled from the command line > > + adr_l x1, id_aa64mmfr1_val > > + ldr x0, [x1] > > + adr_l x1, id_aa64mmfr1_mask > > + ldr x1, [x1] > > + ubfx x0, x0, #ID_AA64MMFR1_VHE_SHIFT, #4 > > + ubfx x1, x1, #ID_AA64MMFR1_VHE_SHIFT, #4 > > + cbz x1, 1f > > + and x0, x0, x1 > > + cbz x0, 2f > > +1: > > I can see the advantage here in separate id_aa64mmfr1_val/mask but we > could use some asm offsets here and keep the pointer indirection simpler > in C code. You'd just need something like 'adr_l mmfr1_ovrd + VAL_OFFSET'. > > Anyway, if you have a strong preference for the current approach, leave > it as is. I've now moved over to a structure containing both val/mask, meaning that we only need to keep a single pointer around in the various feature descriptors. It certainly looks better. Thanks, M. -- Without deviation from the norm, progress is not possible.