From: Thomas Gleixner <tglx@linutronix.de>
To: Xiaoyao Li <xiaoyao.li@intel.com>, Ingo Molnar <mingo@redhat.com>,
Borislav Petkov <bp@alien8.de>,
hpa@zytor.com, Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <sean.j.christopherson@intel.com>,
kvm@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org
Cc: Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Arvind Sankar <nivedita@alum.mit.edu>,
Fenghua Yu <fenghua.yu@intel.com>,
Tony Luck <tony.luck@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Jim Mattson <jmattson@google.com>,
Xiaoyao Li <xiaoyao.li@intel.com>
Subject: Re: [PATCH v5 2/9] x86/split_lock: Avoid runtime reads of the TEST_CTRL MSR
Date: Mon, 23 Mar 2020 18:06:04 +0100 [thread overview]
Message-ID: <87wo7bovb7.fsf@nanos.tec.linutronix.de> (raw)
In-Reply-To: <20200315050517.127446-3-xiaoyao.li@intel.com>
Xiaoyao Li <xiaoyao.li@intel.com> writes:
> +/*
> + * Soft copy of MSR_TEST_CTRL initialized when we first read the
> + * MSR. Used at runtime to avoid using rdmsr again just to collect
> + * the reserved bits in the MSR. We assume reserved bits are the
> + * same on all CPUs.
> + */
> +static u64 test_ctrl_val;
> +
> /*
> * Locking is not required at the moment because only bit 29 of this
> * MSR is implemented and locking would not prevent that the operation
> @@ -1027,16 +1035,14 @@ static void __init split_lock_setup(void)
> */
> static void __sld_msr_set(bool on)
> {
> - u64 test_ctrl_val;
> -
> - rdmsrl(MSR_TEST_CTRL, test_ctrl_val);
> + u64 val = test_ctrl_val;
>
> if (on)
> - test_ctrl_val |= MSR_TEST_CTRL_SPLIT_LOCK_DETECT;
> + val |= MSR_TEST_CTRL_SPLIT_LOCK_DETECT;
> else
> - test_ctrl_val &= ~MSR_TEST_CTRL_SPLIT_LOCK_DETECT;
> + val &= ~MSR_TEST_CTRL_SPLIT_LOCK_DETECT;
>
> - wrmsrl(MSR_TEST_CTRL, test_ctrl_val);
> + wrmsrl(MSR_TEST_CTRL, val);
> }
>
> /*
> @@ -1048,11 +1054,13 @@ static void __sld_msr_set(bool on)
> */
> static void split_lock_init(struct cpuinfo_x86 *c)
> {
> - u64 test_ctrl_val;
> + u64 val;
>
> - if (rdmsrl_safe(MSR_TEST_CTRL, &test_ctrl_val))
> + if (rdmsrl_safe(MSR_TEST_CTRL, &val))
> goto msr_broken;
>
> + test_ctrl_val = val;
> +
> switch (sld_state) {
> case sld_off:
> if (wrmsrl_safe(MSR_TEST_CTRL, test_ctrl_val & ~MSR_TEST_CTRL_SPLIT_LOCK_DETECT))
That's just broken. Simply because
case sld_warn:
case sld_fatal:
set the split lock detect bit, but the cache variable has it cleared
unless it was set at boot time already.
Thanks,
tglx
next prev parent reply other threads:[~2020-03-23 17:06 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-15 5:05 [PATCH v5 0/9] x86/split_lock: Add feature split lock detection Xiaoyao Li
2020-03-15 5:05 ` [PATCH v5 1/9] x86/split_lock: Rework the initialization flow of " Xiaoyao Li
2020-03-21 0:41 ` Luck, Tony
2020-03-23 17:02 ` Thomas Gleixner
2020-03-23 20:24 ` Thomas Gleixner
2020-03-24 1:10 ` Xiaoyao Li
2020-03-24 10:29 ` Thomas Gleixner
2020-03-25 0:18 ` Xiaoyao Li
2020-03-25 0:52 ` Thomas Gleixner
2020-03-24 11:51 ` Xiaoyao Li
2020-03-24 13:31 ` Thomas Gleixner
2020-03-15 5:05 ` [PATCH v5 2/9] x86/split_lock: Avoid runtime reads of the TEST_CTRL MSR Xiaoyao Li
2020-03-21 0:43 ` Luck, Tony
2020-03-23 17:06 ` Thomas Gleixner
2020-03-23 17:06 ` Thomas Gleixner [this message]
2020-03-24 1:16 ` Xiaoyao Li
2020-03-15 5:05 ` [PATCH v5 3/9] x86/split_lock: Re-define the kernel param option for split_lock_detect Xiaoyao Li
2020-03-21 0:46 ` Luck, Tony
2020-03-23 17:10 ` Thomas Gleixner
2020-03-24 1:38 ` Xiaoyao Li
2020-03-24 10:40 ` Thomas Gleixner
2020-03-24 18:02 ` Sean Christopherson
2020-03-24 18:42 ` Thomas Gleixner
2020-03-25 0:43 ` Xiaoyao Li
2020-03-25 1:03 ` Thomas Gleixner
2020-03-15 5:05 ` [PATCH v5 4/9] x86/split_lock: Export handle_user_split_lock() Xiaoyao Li
2020-03-21 0:48 ` Luck, Tony
2020-03-15 5:05 ` [PATCH v5 5/9] kvm: x86: Emulate split-lock access as a write Xiaoyao Li
2020-03-15 5:05 ` [PATCH v5 6/9] kvm: vmx: Extend VMX's #AC interceptor to handle split lock #AC happens in guest Xiaoyao Li
2020-03-15 5:05 ` [PATCH v5 7/9] kvm: x86: Emulate MSR IA32_CORE_CAPABILITIES Xiaoyao Li
2020-03-15 5:05 ` [PATCH v5 8/9] kvm: vmx: Enable MSR_TEST_CTRL for intel guest Xiaoyao Li
2020-03-15 5:05 ` [PATCH v5 9/9] x86: vmx: virtualize split lock detection Xiaoyao Li
2020-03-23 2:18 ` [PATCH v5 0/9] x86/split_lock: Add feature " Xiaoyao Li
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