From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF5EC1FCFC5 for ; Mon, 27 Jan 2025 09:42:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737970946; cv=none; b=G2taYt1JbZ+gdz1aCcyBZn4Kh+aUXftfhY4r0pzpxzpecxLsRvRWdS/w/GnWimIRMDlgHud65X00RUCsaqftIf45EtkUVVI79cIw6RPbA85pg2++mrAgvL6XW+P7oL2epU60GLa7FP1bbQb+jsMydSEjSRLQw/wCBF+Vr88+UEg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737970946; c=relaxed/simple; bh=ohfDBAmoayP8IrJNjGUusvEbeZpUK55VObBZKVSfSRg=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=hkBY6e8fWJAKcnvaH6VAp7aSPDH4XnIq+I/Ha6rF+H3KVq6eHkCzvb9/IjslPDalwSsiKwdZbJJOgalegYyv+VT0HFek0aIV7x4PX5f+6jB1b0oQ7SaeWwwvwv0pRxNbCBNqAUaopbi9P33RTVKULCQj1aQng6OGjKL4yehJnEs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UybtgWkK; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UybtgWkK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737970945; x=1769506945; h=from:to:cc:subject:in-reply-to:references:date: message-id:mime-version; bh=ohfDBAmoayP8IrJNjGUusvEbeZpUK55VObBZKVSfSRg=; b=UybtgWkK9k7h9OjQoaAsMBvXSKzQlcAF5mZ1PC1cot/J9fQN4KGBXgKx T8QuiTEraMTg20sPCruMg5CuA40VDQDuhSLeZGX9/HhlOirXQMFga926/ LbmJZepBM02oIpt8+GOLqHZhGJ12IdNbQjhwpsWnUP2rQPBssa44og5lD Kc6UMcbtrTFL9hJ3OnkwguCMpFltRpoc7dtzwwkkeMay+sDYGwJGfgVp9 TrwQnjqwBcw7wVgbYHcr5/kXgKouTOe6wM18eqnMreIhZOYt6yhkOsP5F ohHtY5AhVHZwwUISjhTuer3bvrSmXjRnTEKlvV8AX4Ch6gAbajkE0kUbG Q==; X-CSE-ConnectionGUID: DJZPAU4sTY6HNHu6DM1Qvg== X-CSE-MsgGUID: ffRkfVztSSq9ybChWo5kdA== X-IronPort-AV: E=McAfee;i="6700,10204,11327"; a="38314474" X-IronPort-AV: E=Sophos;i="6.13,238,1732608000"; d="scan'208";a="38314474" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 01:42:24 -0800 X-CSE-ConnectionGUID: LsbxCPpfS5KWp8A63lDAfQ== X-CSE-MsgGUID: +3ONxMERRSa063wOIg+bEA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="145610415" Received: from unknown (HELO ubik) ([10.237.72.184]) by orviesa001.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 01:42:21 -0800 From: Alexander Shishkin To: kan.liang@linux.intel.com, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, namhyung@kernel.org, irogers@google.com, adrian.hunter@intel.com, linux-kernel@vger.kernel.org, alexander.shishkin@linux.intel.com Cc: Kan Liang Subject: Re: [PATCH] perf/x86/intel: Clean up PEBS-via-PT on hybrid In-Reply-To: <20250124183432.3565061-1-kan.liang@linux.intel.com> References: <20250124183432.3565061-1-kan.liang@linux.intel.com> Date: Mon, 27 Jan 2025 11:42:19 +0200 Message-ID: <87y0ywzj7o.fsf@ubik.fi.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain [sending again, because smtp is hard, for some reason] kan.liang@linux.intel.com writes: > From: Kan Liang > > The PEBS-via-PT feature is exposed for the e-core of some hybrid > platforms, e.g., ADL and MTL. But it never works. > > $ dmesg | grep PEBS > [ 1.793888] core: cpu_atom PMU driver: PEBS-via-PT > > $ perf record -c 1000 -e '{intel_pt/branch=0/, > cpu_atom/cpu-cycles,aux-output/pp}' -C8 > Error: > The sys_perf_event_open() syscall returned with 22 (Invalid argument) > for event (cpu_atom/cpu-cycles,aux-output/pp). > "dmesg | grep -i perf" may provide additional information. > > The "PEBS-via-PT" is printed if the corresponding bit of per-PMU > capabilities is set. Since the feature is supported by the e-core HW, > perf sets the bit for e-core. However, for Intel PT, if a feature is not > supported on all CPUs, it is not supported at all. The PEBS-via-PT event > cannot be created successfully. > > The PEBS-via-PT is no longer enumerated on the latest hybrid platform. It > will be deprecated on future platforms with Arch PEBS. Let's remove it > from the existing hybrid platforms. There are still lots of them in use in the wild, I'd still like to fix this properly instead of chopping it off. Unless there's a reason not to? Thanks, -- Alex