Re: [PATCH v10 16/38] x86/ptrace: Add FRED additional information to the pt_regs structure

Nikolay Borisov
2023-09-20T12:57:34Z

On 14.09.23 г. 7:47 ч., Xin Li wrote:
> FRED defines additional information in the upper 48 bits of cs/ss
> fields. Therefore add the information definitions into the pt_regs
> structure.
>
> Specially introduce a new structure fred_ss to denote the FRED flags
> above SS selector, which avoids FRED_SSX_ macros and makes the code
> simpler and easier to read.
>
> Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> Tested-by: Shan Kang <shan.kang@intel.com>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Xin Li <xin3.li@intel.com>
> ---
>
> Changes since v9:
> * Introduce a new structure fred_ss to denote the FRED flags above SS
> selector, which avoids FRED_SSX_ macros and makes the code simpler
> and easier to read (Thomas Gleixner).
> * Use type u64 to define FRED bit fields instead of type unsigned int
> (Thomas Gleixner).
>
> Changes since v8:
> * Reflect stack frame definition changes from FRED spec 3.0 to 5.0.
> * Use __packed instead of __attribute__((__packed__)) (Borislav Petkov).
> * Put all comments above the members, like the rest of the file does
> (Borislav Petkov).
>
> Changes since v3:
> * Rename csl/ssl of the pt_regs structure to csx/ssx (x for extended)
> (Andrew Cooper).
> ---
> arch/x86/include/asm/ptrace.h | 51 +++++++++++++++++++++++++++++++----
> 1 file changed, 46 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
> index f08ea073edd6..5786c8ca5f4c 100644
> --- a/arch/x86/include/asm/ptrace.h
> +++ b/arch/x86/include/asm/ptrace.h
> @@ -56,6 +56,25 @@ struct pt_regs {
>
> #else /* __i386__ */
>
> +struct fred_ss {
> + u64 ss : 16, // SS selector

Is this structure conformant to the return state as described in FRED 5.0?

— The stack segment of the interrupted context, 64 bits formatted as follows:

• Bits 15:0 contain the SS selector. < - WE HAVE THIS

• Bits 31:16 are not currently defined and will be zero until they are. < - MISSING hole?

> + sti : 1, // STI state < -
> + swevent : 1, // Set if syscall, sysenter or INT n
> + nmi : 1, // Event is NMI type
> + : 13,
> + vector : 8, // Event vector
> + : 8,
> + type : 4, // Event type
> + : 4,
> + enclave : 1, // Event was incident to enclave execution
> + lm : 1, // CPU was in long mode
> + nested : 1, // Nested exception during FRED delivery
> + // not set for #DF
> + : 1,
> + insnlen : 4; // The length of the instruction causing the event
> + // Only set for INT0, INT1, INT3, INT n, SYSCALL
> +}; // and SYSENTER. 0 otherwise.
> +

<Snip>