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From: Eric Anholt <eric@anholt.net>
To: Zhenyu Wang <zhenyuw@linux.intel.com>, Takashi Iwai <tiwai@suse.de>
Cc: David Airlie <airlied@linux.ie>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] agp/intel: Fix dma mask for Sandybridge
Date: Mon, 23 Aug 2010 07:02:16 -0700	[thread overview]
Message-ID: <87y6bxqvfb.fsf@pollan.anholt.net> (raw)
In-Reply-To: <20100823064854.GE29442@zhen-devel.sh.intel.com>

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On Mon, 23 Aug 2010 14:48:54 +0800, Zhenyu Wang <zhenyuw@linux.intel.com> wrote:
> On 2010.08.23 08:31:42 +0200, Takashi Iwai wrote:
> > > bit 31			 bit 11			 bit 4			bit 0
> > >    |<-physical addr 31:12->|<-physical addr 39:32->|<-cache ctl 3:1->|valid|
> > 
> > Then I really don't understand why it works.
> > You shift 28bit and mask with 0xff.  Obviously it overwrite bits 0:3
> > with original 28:31 bits.  Masking 0xff0 fixes the issue.
> > 
> 
> ah, sorry, my stupid. Thanks for catching this!
> 
> Subject: [PATCH] agp/intel: fix physical address mask bits for sandybridge
> 
> It should shift bit 39-32 into pte's bit 11-4.

Applied.  Thanks!

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      reply	other threads:[~2010-08-23 14:02 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-08-20 15:36 [PATCH] agp/intel: Fix dma mask for Sandybridge Takashi Iwai
2010-08-23  1:35 ` Zhenyu Wang
2010-08-23  5:29   ` Takashi Iwai
2010-08-23  5:43     ` Zhenyu Wang
2010-08-23  6:02       ` Takashi Iwai
2010-08-23  6:13         ` Takashi Iwai
2010-08-23  6:19         ` Zhenyu Wang
2010-08-23  6:31           ` Takashi Iwai
2010-08-23  6:48             ` Zhenyu Wang
2010-08-23 14:02               ` Eric Anholt [this message]

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