From: Thomas Gleixner <tglx@linutronix.de>
To: Tianyang Zhang <zhangtianyang@loongson.cn>,
corbet@lwn.net, alexs@kernel.org, siyanteng@loongson.cn,
chenhuacai@kernel.org, kernel@xen0n.name,
jiaxun.yang@flygoat.com, gaoliang@loongson.cn,
wangliupu@loongson.cn, lvjianmin@loongson.cn,
zhangtianyang@loongson.cn, yijun@loongson.cn, mhocko@suse.com,
akpm@linux-foundation.org, dianders@chromium.org,
maobibo@loongson.cn, xry111@xry111.site, zhaotianrui@loongson.cn,
nathan@kernel.org, yangtiezhu@loongson.cn,
zhoubinbin@loongson.cn
Cc: loongarch@lists.linux.dev, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH V4][RESEND] LoongArch: Add AVEC irqchip support
Date: Wed, 10 Jul 2024 18:30:58 +0200 [thread overview]
Message-ID: <87zfqpus3h.ffs@tglx> (raw)
In-Reply-To: <20240710043859.13053-1-zhangtianyang@loongson.cn>
On Wed, Jul 10 2024 at 12:38, Tianyang Zhang wrote:
> Introduce the advanced extended interrupt controllers. This feature will
> allow each core to have 256 independent interrupt vectors and MSI
> interrupts can be independently routed to any vector on any CPU.
Why are you resending V4 if there have been review comments on the
original V4 submission?
Thanks,
tglx
next prev parent reply other threads:[~2024-07-10 16:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-10 4:38 [PATCH V4][RESEND] LoongArch: Add AVEC irqchip support Tianyang Zhang
2024-07-10 16:30 ` Thomas Gleixner [this message]
2024-07-11 1:40 ` Tianyang Zhang
2024-07-11 14:49 ` Thomas Gleixner
2024-07-12 1:32 ` Tianyang Zhang
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