From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754612AbdKJV4q (ORCPT ); Fri, 10 Nov 2017 16:56:46 -0500 Received: from mail.efficios.com ([167.114.142.141]:40800 "EHLO mail.efficios.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754557AbdKJV4o (ORCPT ); Fri, 10 Nov 2017 16:56:44 -0500 Date: Fri, 10 Nov 2017 21:57:14 +0000 (UTC) From: Mathieu Desnoyers To: Linus Torvalds Cc: Andy Lutomirski , linux-kernel , linux-api , Peter Zijlstra , "Paul E. McKenney" , Boqun Feng , Andrew Hunter , maged michael , Avi Kivity , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Dave Watson , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Andrea Parri , "Russell King, ARM Linux" , Greg Hackmann , Will Deacon , David Sehr , x86 Message-ID: <885227610.13045.1510351034488.JavaMail.zimbra@efficios.com> In-Reply-To: References: <20171110211249.10742-1-mathieu.desnoyers@efficios.com> Subject: Re: [RFC PATCH 0/2] x86: Fix missing core serialization on migration MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Originating-IP: [167.114.142.141] X-Mailer: Zimbra 8.7.11_GA_1854 (ZimbraWebClient - FF52 (Linux)/8.7.11_GA_1854) Thread-Topic: x86: Fix missing core serialization on migration Thread-Index: eAGFpNMYSWyUPxyg3QUxdJakaWGA4A== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ----- On Nov 10, 2017, at 4:36 PM, Linus Torvalds torvalds@linux-foundation.org wrote: > On Fri, Nov 10, 2017 at 1:12 PM, Mathieu Desnoyers > wrote: >> x86 can return to user-space through sysexit and sysretq, which are not >> core serializing. This breaks expectations from user-space about >> sequential consistency from a single-threaded self-modifying program >> point of view in specific migration patterns. >> >> Feedback is welcome, > > We should check with Intel. I would actually be surprised if the I$ > can be out of sync with the D$ after a sysretq. It would actually > break things like "read code from disk" too in theory. That core serializing instruction is not that much about I$ vs D$ consistency, but rather about the processor speculatively executing code ahead of its retirement point. Ref. Intel Architecture Software Developer's Manual, Volume 3: System Programming. 7.1.3. "Handling Self- and Cross-Modifying Code": "The act of a processor writing data into a currently executing code segment with the intent of executing that data as code is called self-modifying code. Intel Architecture processors exhibit model-specific behavior when executing self-modified code, depending upon how far ahead of the current execution pointer the code has been modified. As processor architectures become more complex and start to speculatively execute code ahead of the retirement point (as in the P6 family processors), the rules regarding which code should execute, pre- or post-modification, become blurred. [...]" AFAIU, this core serializing instruction seems to be needed for use-cases of self-modifying code, but not for the initial load of a program from disk, as the processor has no way to have speculatively executed any of its instructions. Hopefully hpa can tell us more about this, Thanks, Mathieu -- Mathieu Desnoyers EfficiOS Inc. http://www.efficios.com