Re: [PATCH v10 033/108] KVM: x86/mmu: Allow non-zero value for non-present SPTE and removed SPTE

Isaku Yamahata
2022-11-17T17:58:43Z

On Wed, Nov 09, 2022 at 11:24:12AM +0000,
"Huang, Kai" <kai.huang@intel.com> wrote:

> > diff --git a/arch/x86/kvm/mmu/spte.c b/arch/x86/kvm/mmu/spte.c
> > index 2e08b2a45361..0b97a045c5f0 100644
> > --- a/arch/x86/kvm/mmu/spte.c
> > +++ b/arch/x86/kvm/mmu/spte.c
> > @@ -419,7 +419,9 @@ void kvm_mmu_set_ept_masks(bool has_ad_bits, bool has_exec_only)
> > shadow_dirty_mask = has_ad_bits ? VMX_EPT_DIRTY_BIT : 0ull;
> > shadow_nx_mask = 0ull;
> > shadow_x_mask = VMX_EPT_EXECUTABLE_MASK;
> > - shadow_present_mask = has_exec_only ? 0ull : VMX_EPT_READABLE_MASK;
> > + /* VMX_EPT_SUPPRESS_VE_BIT is needed for W or X violation. */
> > + shadow_present_mask =
> > + (has_exec_only ? 0ull : VMX_EPT_READABLE_MASK) | VMX_EPT_SUPPRESS_VE_BIT;
>
> I think this chunk can be in a separate patch since it doesn't handle fault from
> non-present to present, which is claimed by the patch title and changelog.
>
> Or I think you need to describe handling W or X fault part in the changelog.

Ok, let me try to split that hunk.
--
Isaku Yamahata <isaku.yamahata@gmail.com>