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([2a00:f502:160:68fe:a26c:adcb:8da8:2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a7c31fb8asm17976745e9.30.2026.04.29.05.42.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Apr 2026 05:42:12 -0700 (PDT) Message-ID: <89f2b7ab-2335-4029-a074-4d9bf956c14f@gmail.com> Date: Wed, 29 Apr 2026 15:42:10 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC v3 04/11] arm64: dts: qcom: msm8939: Add venus node To: Bryan O'Donoghue , Vikash Garodia , Dikshita Agarwal , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?UTF-8?Q?Andr=C3=A9_Apitzsch?= , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org References: <20260427-msm8939-venus-rfc-v3-0-288195bb7917@gmail.com> <20260427-msm8939-venus-rfc-v3-4-288195bb7917@gmail.com> <56d609dd-62be-47eb-8ba3-c5d70d773113@kernel.org> <34627be5-75cc-469b-af23-f1f08ce29820@gmail.com> <2846fc60-bf8c-43b3-ae64-58faad6aed2f@kernel.org> Content-Language: en-US From: Erikas Bitovtas In-Reply-To: <2846fc60-bf8c-43b3-ae64-58faad6aed2f@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 4/28/26 4:36 PM, Bryan O'Donoghue wrote: > On 28/04/2026 10:47, Erikas Bitovtas wrote: >> >> >> On 4/28/26 10:10 AM, Bryan O'Donoghue wrote: >>> On 27/04/2026 18:58, Erikas Bitovtas wrote: >>>> +            video-decoder { >>>> +                compatible = "venus-decoder"; >>>> +                clocks = <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>, >>>> +                     <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>; >>>> +                clock-names = "core0", "core1"; >>>> +                power-domains = <&gcc VENUS_CORE0_GDSC>, >>>> +                        <&gcc VENUS_CORE1_GDSC>; >>>> +                power-domain-names = "core0", "core1"; >>>> +            }; >>>> + >>>> +            video-encoder { >>>> +                compatible = "venus-encoder"; >>>> +                clocks = <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>, >>>> +                     <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>; >>>> +                clock-names = "core0", "core1"; >>>> +                power-domains = <&gcc VENUS_CORE0_GDSC>, >>>> +                        <&gcc VENUS_CORE1_GDSC>; >>>> +                power-domain-names = "core0", "core1"; >>>> +            }; >>> >>> So to be fair in this case you do have a reason to have an encoder and >>> decoder compatible here _but_ it should be the case that one one of the >>> sub-devices contains CORE0 related stuff and the other CORE1 related >>> stuff. >>> >>> Because in that case the sub-devices actually represent individual >>> hardware settings. >>> >>> So listing power-domains and clocks for both cores in each node like >>> this militates against that. >>> >>> The other thing is to double check of the encoder and decoder are inter- >>> changable here i.e. can either core be encoder or decoder or is it >>> fixed ? >>> >>> I believe on older generations - perhaps not on 8939 it is not >>> interchangable. >>> >> I found this in LA.BR.1.2.9.1_rb1.5: >> https://github.com/msm8916-mainline/linux-downstream/blob/ >> b20608408caff817ec874f325127b07609fbaeb8/arch/arm/boot/dts/qcom/ >> msm8939-common.dtsi#L1589 >> Only decoder bits are being set in bus configs. This suggests that the >> cores are not interchangeable. >> Then again, I never managed to get encoding working on MSM8939. Testing >> it with >> gst-launch-1.0 videotestsrc ! videoconvert ! v4l2vp8enc ! queue ! >> v4l2vp8dec ! xvimagesink >> Fails with the following log: https://pastebin.com/nmZcLgPV >> And in dmesg it reports a firmware error: >> [  784.461031] qcom-venus 1d00000.video-codec: no valid instance(pkt >> session_id:dead, pkt:21001) >> [  784.461126] qcom-venus-decoder 1d00000.video-codec:video-decoder: >> dec: event session error 0 >> [  784.461200] qcom-venus-encoder 1d00000.video-codec:video-encoder: >> enc: event session error 0 >> [  784.468799] qcom-venus 1d00000.video-codec: SFR message from FW: >> QC_IMAGE_VERSION_STRING=VIDEO.VE.1.8-00099, Err_Fatal - >> Z:\b\venus\utils\src\vbuffer.c:1319: >> [  785.791641] qcom-venus 1d00000.video-codec: System error has >> occurred, recovery failed to init HFI >> [  787.018339] qcom-venus 1d00000.video-codec: System error has >> occurred, recovery failed to init HFI >> [  787.097253] qcom-venus 1d00000.video-codec: system error has occurred >> (recovered) >> This happens regardless of whether I enable the cores for encoding too >> or not. The same errors were happening on MSM8916 as well. So I can't >> tell if these cores are interchangeable just by testing. > > Right so if you swap around the definition of which core is encoder and > which decoder do you get the same or different result ? > If I set the core0 to be decoder, only HEVC decoding works. If I set core1, only non-HEVC decoding works. Encoding doesn't work regardless.> i.e. is it because you are trying to get encoder running generally or > because of the core you are doing it on ? > > How about declaring both cores a decoder ? > That is what I did on v1. Ideally we'd decide which core we want to power up based on what codec we are dealing with, but given there is no easy way to do so on mainline yet, it could work.> --- > bod