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22:33:13 -0800 (PST) Received: from [10.225.163.81] (unknown [10.225.163.81]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4K4g2J70X7z1Rvlx; Thu, 24 Feb 2022 22:33:12 -0800 (PST) Message-ID: <8b809200-189d-940d-4a32-dc74cde6b626@opensource.wdc.com> Date: Fri, 25 Feb 2022 15:33:11 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v2 1/3] ata: ahci: Rename board_ahci_mobile Content-Language: en-US To: Mario Limonciello Cc: "open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)" , open list , pmenzel@molgen.mpg.de, hdegoede@redhat.com References: <20220225061113.223920-1-mario.limonciello@amd.com> From: Damien Le Moal Organization: Western Digital Research In-Reply-To: <20220225061113.223920-1-mario.limonciello@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/25/22 15:11, Mario Limonciello wrote: > This board definition was originally created for mobile devices to > designate default link power managmeent policy to influence runtime > power consumption. > > As this is interesting for more than just mobile designs, rename the > board to `board_ahci_low_power` to make it clear it is about default > policy. > > Signed-off-by: Mario Limonciello > --- > changes from v1->v2: > * Rename to board_ahci_low_power > > drivers/ata/ahci.c | 96 +++++++++++++++++++++++----------------------- > 1 file changed, 48 insertions(+), 48 deletions(-) > > diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c > index ab5811ef5a53..995ef962eb92 100644 > --- a/drivers/ata/ahci.c > +++ b/drivers/ata/ahci.c > @@ -49,8 +49,8 @@ enum { > enum board_ids { > /* board IDs by feature in alphabetical order */ > board_ahci, > + board_ahci_low_power, Nit: please keep the alphabetical order. > board_ahci_ign_iferr, > - board_ahci_mobile, > board_ahci_no_debounce_delay, > board_ahci_nomsi, > board_ahci_noncq, > @@ -135,7 +135,7 @@ static const struct ata_port_info ahci_port_info[] = { > .udma_mask = ATA_UDMA6, > .port_ops = &ahci_ops, > }, > - [board_ahci_mobile] = { > + [board_ahci_low_power] = { > AHCI_HFLAGS (AHCI_HFLAG_IS_MOBILE), > .flags = AHCI_FLAG_COMMON, > .pio_mask = ATA_PIO4, > @@ -275,13 +275,13 @@ static const struct pci_device_id ahci_pci_tbl[] = { > { PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */ > { PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */ > { PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */ > - { PCI_VDEVICE(INTEL, 0x2929), board_ahci_mobile }, /* ICH9M */ > - { PCI_VDEVICE(INTEL, 0x292a), board_ahci_mobile }, /* ICH9M */ > - { PCI_VDEVICE(INTEL, 0x292b), board_ahci_mobile }, /* ICH9M */ > - { PCI_VDEVICE(INTEL, 0x292c), board_ahci_mobile }, /* ICH9M */ > - { PCI_VDEVICE(INTEL, 0x292f), board_ahci_mobile }, /* ICH9M */ > + { PCI_VDEVICE(INTEL, 0x2929), board_ahci_low_power }, /* ICH9M */ > + { PCI_VDEVICE(INTEL, 0x292a), board_ahci_low_power }, /* ICH9M */ > + { PCI_VDEVICE(INTEL, 0x292b), board_ahci_low_power }, /* ICH9M */ > + { PCI_VDEVICE(INTEL, 0x292c), board_ahci_low_power }, /* ICH9M */ > + { PCI_VDEVICE(INTEL, 0x292f), board_ahci_low_power }, /* ICH9M */ > { PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */ > - { PCI_VDEVICE(INTEL, 0x294e), board_ahci_mobile }, /* ICH9M */ > + { PCI_VDEVICE(INTEL, 0x294e), board_ahci_low_power }, /* ICH9M */ > { PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */ > { PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */ > { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */ > @@ -291,9 +291,9 @@ static const struct pci_device_id ahci_pci_tbl[] = { > { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */ > { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */ > { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */ > - { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_mobile }, /* PCH M AHCI */ > + { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */ > { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ > - { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_mobile }, /* PCH M RAID */ > + { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_low_power }, /* PCH M RAID */ > { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ > { PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */ > { PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */ > @@ -316,9 +316,9 @@ static const struct pci_device_id ahci_pci_tbl[] = { > { PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */ > { PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */ > { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */ > - { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_mobile }, /* CPT M AHCI */ > + { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_low_power }, /* CPT M AHCI */ > { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */ > - { PCI_VDEVICE(INTEL, 0x1c05), board_ahci_mobile }, /* CPT M RAID */ > + { PCI_VDEVICE(INTEL, 0x1c05), board_ahci_low_power }, /* CPT M RAID */ > { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */ > { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */ > { PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */ > @@ -327,29 +327,29 @@ static const struct pci_device_id ahci_pci_tbl[] = { > { PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG/Lewisburg RAID*/ > { PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */ > { PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */ > - { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_mobile }, /* Panther M AHCI */ > + { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_low_power }, /* Panther M AHCI */ > { PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */ > { PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */ > { PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */ > - { PCI_VDEVICE(INTEL, 0x1e07), board_ahci_mobile }, /* Panther M RAID */ > + { PCI_VDEVICE(INTEL, 0x1e07), board_ahci_low_power }, /* Panther M RAID */ > { PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */ > { PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */ > - { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_mobile }, /* Lynx M AHCI */ > + { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_low_power }, /* Lynx M AHCI */ > { PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */ > - { PCI_VDEVICE(INTEL, 0x8c05), board_ahci_mobile }, /* Lynx M RAID */ > + { PCI_VDEVICE(INTEL, 0x8c05), board_ahci_low_power }, /* Lynx M RAID */ > { PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */ > - { PCI_VDEVICE(INTEL, 0x8c07), board_ahci_mobile }, /* Lynx M RAID */ > + { PCI_VDEVICE(INTEL, 0x8c07), board_ahci_low_power }, /* Lynx M RAID */ > { PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */ > - { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_mobile }, /* Lynx M RAID */ > - { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_mobile }, /* Lynx LP AHCI */ > - { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_mobile }, /* Lynx LP AHCI */ > - { PCI_VDEVICE(INTEL, 0x9c04), board_ahci_mobile }, /* Lynx LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9c05), board_ahci_mobile }, /* Lynx LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9c06), board_ahci_mobile }, /* Lynx LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9c07), board_ahci_mobile }, /* Lynx LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_mobile }, /* Lynx LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_mobile }, /* Lynx LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_mobile }, /* Cannon Lake PCH-LP AHCI */ > + { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_low_power }, /* Lynx M RAID */ > + { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_low_power }, /* Lynx LP AHCI */ > + { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_low_power }, /* Lynx LP AHCI */ > + { PCI_VDEVICE(INTEL, 0x9c04), board_ahci_low_power }, /* Lynx LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c05), board_ahci_low_power }, /* Lynx LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c06), board_ahci_low_power }, /* Lynx LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c07), board_ahci_low_power }, /* Lynx LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_low_power }, /* Lynx LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_low_power }, /* Lynx LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_low_power }, /* Cannon Lake PCH-LP AHCI */ > { PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */ > { PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */ > { PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */ > @@ -381,26 +381,26 @@ static const struct pci_device_id ahci_pci_tbl[] = { > { PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */ > { PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */ > { PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */ > - { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_mobile }, /* Wildcat LP AHCI */ > - { PCI_VDEVICE(INTEL, 0x9c85), board_ahci_mobile }, /* Wildcat LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9c87), board_ahci_mobile }, /* Wildcat LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_mobile }, /* Wildcat LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_low_power }, /* Wildcat LP AHCI */ > + { PCI_VDEVICE(INTEL, 0x9c85), board_ahci_low_power }, /* Wildcat LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c87), board_ahci_low_power }, /* Wildcat LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_low_power }, /* Wildcat LP RAID */ > { PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */ > - { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_mobile }, /* 9 Series M AHCI */ > + { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_low_power }, /* 9 Series M AHCI */ > { PCI_VDEVICE(INTEL, 0x8c84), board_ahci }, /* 9 Series RAID */ > - { PCI_VDEVICE(INTEL, 0x8c85), board_ahci_mobile }, /* 9 Series M RAID */ > + { PCI_VDEVICE(INTEL, 0x8c85), board_ahci_low_power }, /* 9 Series M RAID */ > { PCI_VDEVICE(INTEL, 0x8c86), board_ahci }, /* 9 Series RAID */ > - { PCI_VDEVICE(INTEL, 0x8c87), board_ahci_mobile }, /* 9 Series M RAID */ > + { PCI_VDEVICE(INTEL, 0x8c87), board_ahci_low_power }, /* 9 Series M RAID */ > { PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */ > - { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_mobile }, /* 9 Series M RAID */ > - { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_mobile }, /* Sunrise LP AHCI */ > - { PCI_VDEVICE(INTEL, 0x9d05), board_ahci_mobile }, /* Sunrise LP RAID */ > - { PCI_VDEVICE(INTEL, 0x9d07), board_ahci_mobile }, /* Sunrise LP RAID */ > + { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_low_power }, /* 9 Series M RAID */ > + { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_low_power }, /* Sunrise LP AHCI */ > + { PCI_VDEVICE(INTEL, 0x9d05), board_ahci_low_power }, /* Sunrise LP RAID */ > + { PCI_VDEVICE(INTEL, 0x9d07), board_ahci_low_power }, /* Sunrise LP RAID */ > { PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */ > - { PCI_VDEVICE(INTEL, 0xa103), board_ahci_mobile }, /* Sunrise M AHCI */ > + { PCI_VDEVICE(INTEL, 0xa103), board_ahci_low_power }, /* Sunrise M AHCI */ > { PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */ > { PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */ > - { PCI_VDEVICE(INTEL, 0xa107), board_ahci_mobile }, /* Sunrise M RAID */ > + { PCI_VDEVICE(INTEL, 0xa107), board_ahci_low_power }, /* Sunrise M RAID */ > { PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */ > { PCI_VDEVICE(INTEL, 0xa182), board_ahci }, /* Lewisburg AHCI*/ > { PCI_VDEVICE(INTEL, 0xa186), board_ahci }, /* Lewisburg RAID*/ > @@ -413,13 +413,13 @@ static const struct pci_device_id ahci_pci_tbl[] = { > { PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */ > { PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */ > { PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */ > - { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_mobile }, /* Bay Trail AHCI */ > - { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */ > - { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */ > - { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */ > - { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */ > - { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_mobile }, /* Comet Lake PCH-U AHCI */ > - { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_mobile }, /* Comet Lake PCH RAID */ > + { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_low_power }, /* Bay Trail AHCI */ > + { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_low_power }, /* Bay Trail AHCI */ > + { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_low_power }, /* Cherry Tr. AHCI */ > + { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_low_power }, /* ApolloLake AHCI */ > + { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */ > + { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */ > + { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */ > > /* JMicron 360/1/3/5/6, match class to avoid IDE function */ > { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, > @@ -447,7 +447,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { > { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ > { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */ > { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */ > - { PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */ > + { PCI_VDEVICE(AMD, 0x7901), board_ahci_low_power }, /* AMD Green Sardine */ > /* AMD is using RAID class only for ahci controllers */ > { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, > PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci }, -- Damien Le Moal Western Digital Research