From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752551AbdJSQ36 (ORCPT ); Thu, 19 Oct 2017 12:29:58 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:44843 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752313AbdJSQ34 (ORCPT ); Thu, 19 Oct 2017 12:29:56 -0400 X-Google-Smtp-Source: ABhQp+S3LC6uQ4X1mdxLS1wftLLKMDkoF88r5aXB5tAkFq9Gx/NfEtL9rkG6UiUGvbcilb5GCm1Tsw== Subject: Re: [PATCH v3 05/10] arm: dts: mt7623: update pio, usb and crypto nodes To: Ryder Lee Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Erin Lo , YT Shen References: <08d722e47b83bd70ed4d3c9a4546a3f70df96de4.1506908511.git.ryder.lee@mediatek.com> From: Matthias Brugger Message-ID: <8c823070-7181-97cc-063e-3ced59c7e17d@gmail.com> Date: Thu, 19 Oct 2017 18:29:52 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <08d722e47b83bd70ed4d3c9a4546a3f70df96de4.1506908511.git.ryder.lee@mediatek.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/02/2017 03:54 AM, Ryder Lee wrote: > This patch updates pio, usb and crypto nodes to make them be consistent > with the binding documents. > > Signed-off-by: Ryder Lee > --- > arch/arm/boot/dts/mt7623.dtsi | 26 ++++++++++++++------------ > 1 file changed, 14 insertions(+), 12 deletions(-) > > diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi > index 381843e..0640fb7 100644 > --- a/arch/arm/boot/dts/mt7623.dtsi > +++ b/arch/arm/boot/dts/mt7623.dtsi > @@ -227,8 +227,7 @@ > }; > > pio: pinctrl@10005000 { > - compatible = "mediatek,mt7623-pinctrl", > - "mediatek,mt2701-pinctrl"; > + compatible = "mediatek,mt7623-pinctrl"; Looks good. > reg = <0 0x1000b000 0 0x1000>; > mediatek,pctl-regmap = <&syscfg_pctl_a>; > pins-are-numbered; > @@ -680,7 +679,7 @@ > interrupts = ; > clocks = <&hifsys CLK_HIFSYS_USB0PHY>, > <&topckgen CLK_TOP_ETHIF_SEL>; > - clock-names = "sys_ck", "free_ck"; > + clock-names = "sys_ck", "ref_ck"; This is already merged. Please rebase. > power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; > phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>; > status = "disabled"; > @@ -690,8 +689,6 @@ > compatible = "mediatek,mt7623-u3phy", > "mediatek,mt2701-u3phy"; > reg = <0 0x1a1c4000 0 0x0700>; > - clocks = <&clk26m>; > - clock-names = "u3phya_ref"; Same here. > #address-cells = <2>; > #size-cells = <2>; > ranges; > @@ -699,12 +696,16 @@ > > u2port0: usb-phy@1a1c4800 { > reg = <0 0x1a1c4800 0 0x0100>; > + clocks = <&topckgen CLK_TOP_USB_PHY48M>; > + clock-names = "ref"; Same here. > #phy-cells = <1>; > status = "okay"; > }; > > u3port0: usb-phy@1a1c4900 { > reg = <0 0x1a1c4900 0 0x0700>; > + clocks = <&clk26m>; > + clock-names = "ref"; Same here. > #phy-cells = <1>; > status = "okay"; > }; > @@ -719,7 +720,7 @@ > interrupts = ; > clocks = <&hifsys CLK_HIFSYS_USB1PHY>, > <&topckgen CLK_TOP_ETHIF_SEL>; > - clock-names = "sys_ck", "free_ck"; > + clock-names = "sys_ck", "ref_ck"; Same here. > power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; > phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>; > status = "disabled"; > @@ -729,8 +730,6 @@ > compatible = "mediatek,mt7623-u3phy", > "mediatek,mt2701-u3phy"; > reg = <0 0x1a244000 0 0x0700>; > - clocks = <&clk26m>; > - clock-names = "u3phya_ref"; Same here. > #address-cells = <2>; > #size-cells = <2>; > ranges; > @@ -738,12 +737,16 @@ > > u2port1: usb-phy@1a244800 { > reg = <0 0x1a244800 0 0x0100>; > + clocks = <&topckgen CLK_TOP_USB_PHY48M>; > + clock-names = "ref"; Same here. > #phy-cells = <1>; > status = "okay"; > }; > > u3port1: usb-phy@1a244900 { > reg = <0 0x1a244900 0 0x0700>; > + clocks = <&clk26m>; > + clock-names = "ref"; Same here. > #phy-cells = <1>; > status = "okay"; > }; > @@ -784,16 +787,15 @@ > }; > > crypto: crypto@1b240000 { > - compatible = "mediatek,mt7623-crypto"; > + compatible = "mediatek,eip97-crypto"; Crypto node is not present in upstream. Regards, Matthias > reg = <0 0x1b240000 0 0x20000>; > interrupts = , > , > , > , > ; > - clocks = <&topckgen CLK_TOP_ETHIF_SEL>, > - <ðsys CLK_ETHSYS_CRYPTO>; > - clock-names = "ethif","cryp"; > + clocks = <ðsys CLK_ETHSYS_CRYPTO>; > + clock-names = "cryp"; > power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; > status = "disabled"; > }; >